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We report on a novel near infrared SiGe phototransistor fabricated by a standard silicon photonics foundry. The device is first investigated by simulations. The fabricated devices are characterized in terms of current-voltage characteristics at different optical power. Typical phototransistors exhibit 1.55µm record responsivity at low optical power exceeding 232A/W and 42A/W at 5V and 1V bias, respectively. A differential detection scheme is also proposed for the dark current cancellation to significantly increase the device sensitivity.
© 2015 Optical Society of America
1. Introduction
The ever increasing demand for massive data handling is promoting optical interconnects at all levels, from long haul connections to metro networks, high performance computing and data centers, rack-to-rack, down to on-board and chip-to-chip links [1]. Long distance optical transmissions are far superior with respect to their electrical counterpart thanks to negligible propagation losses and crosstalk, large capacity and noise immunity. However, small distance optical interconnects like on-board and on-chip links must provide very large bandwidth and extremely low power consumption in order to be competitive [2,3]. At the receiver end, the requirements include high responsivity, high speed and ultra-low capacitance photodiodes integrated in close proximity of the transimpedance and limiting amplifiers (TIA/LA). Significant progress has been made in the monolithic integration of Germanium on Silicon [4,5] and high performance detectors (comparable to III-V devices) have been demonstrated in waveguide integrated schemes to allow large responsivity and high speed thanks to low capacitance and large absorption efficiency [6–9]. Although such achievements demonstrate photodetectors matching the metrics required for on-chip optical interconnects, the classical approach based on a photodetector followed by TIA/LA is quite expensive in terms of both footprint and power dissipation. Using a photodetector with internal gain may reduce the complexity of the receiver electronics or even may allow eliminating it adopting a receiver-less scheme where a digital circuit is directly switched by photons. To this extent, several groups have focused on the design and fabrication of phototransistors, resorting to different devices including MOSFET [10,11], JFET [12,13], and BJT [14–16]. Although most of the proposed devices are fabricated by CMOS compatible processes, the required technology is still not available for production.
In this work we report on a SiGe heterojunction bipolar phototransistor fabricated by adapting the available design kit of a commercially available Si photonics foundry. The device is simulated and its principle of operation is first demonstrated using TCAD (Technology Computer Aided Design) simulation tools. The fabricated devices are measured at 1.55 μm and exhibit maximum responsivity exceeding 232 A/W with a dark current of about 45 μA at 5V, and 42 A/W with 9 μA dark current at 1V. A significant increase of the device sensitivity is also demonstrated resorting to a differential detection scheme that provides the dark current cancellation.
2. Device design and simulation
We aimed at the fabrication of a monolithically integrated phototransistor using a standard Si photonics process. We chose an IME A*STAR Si photonics multi-project wafer run provided by CMC Microsystems. The available design kit includes waveguides, couplers, modulators and Ge photodiodes but does not provide transistors. Therefore, we have adapted the design in order to obtain a phototransistor while satisfying the foundry design rules. In order to obtain a phototransistor, we exploited the available Ge-on-Si vertical p-i-n waveguide photodiode. The standard device consists of a 500nm Ge epi-layer deposited onto a 220nm boron doped SOI overlayer; a shallow n + implant is made on top of the Ge layer for the cathode contact whereas a p + well is realized in the Si for the ohmic contact at the anode. We slightly modified such device structure in order to obtain a phototransistor, as shown in Fig. 1. We made two separate p + + implants to obtain two different contacts (collector and emitter) on Si, one for each side of the Ge layer (base). The boron implant in the Si was skipped, leaving its starting low p-type doping (~10Ωcm) in order to prevent the current flow through Si and to promote conduction through the Si-Ge hetero-junction. For a low enough Si doping, we expect the Si-Ge-Si structure to behave as a hetero-junction bipolar transistor, when a voltage is applied between the two p + + wells (namely the collector and the emitter). In this way, the current flows preferentially into the Ge layer providing the transistor effect, with the germanium acting as the transistor base. If the base contact is kept floating and a positive voltage is applied between the emitter and the collector, the Ge base gets self-biased resulting in a transistor active mode. When the device is illuminated, the photo-generated carriers change the base potential thus increasing the collector current. The device has been designed in a waveguide geometry. Light is launched through a TE integrated grating coupler [17] in a short single-mode silicon waveguide (220x480nm) tapered to the phototransistor (220nm x 4µm cross section, 18µm long). Light is absorbed in the Ge layer through evanescent coupling.
In order to validate our hypothesis about the device principle of operation, we simulated the structure with a Technology Computer Aided Design (TCAD) by ISE (Integrated Systems Engineering). Ge and Si doping was modeled according to the foundry process flows using constant donors and acceptors profiles (p + + and n + + = 1019cm−3). The unintentional doping of the Ge layer is unknown and we referred to what is reported in literature for typical CVD grown Ge on Si (equivalent doping 1015cm−3) [18]. Ge absorption coefficient was set to 2000 cm−1 [19]. We ran simulations applying a voltage between the two p + + Si wells and leaving the Ge base contact floating. Figure 2 shows the current density distribution in the device cross-section for an applied collector-emitter voltage of 5V. The current flows preferentially into the Ge layer crossing two Si-Ge heterojunctions.
Figures 3(a) and 3(b) shows the energy band diagram of the base-emitter (BE) and the base-collector (BC) junctions respectively, both in dark and under illumination with 5V bias applied between the emitter and the collector. As expected, the BE and the BC junctions are forward and reverse biased, respectively. When light shines in the Ge film the base potential decreases thus increasing the current flow from the emitter to the collector.
Figure 4 shows the simulated I-V curves for different light intensities at λ = 1.55µm. The characteristics clearly demonstrate the transistor effect with an increase of the collector current with the optical power that acts similarly to an applied base voltage. The resulting responsivity (calculated as the ratio between the net photocurrent and the input power) exceeds the maximum theoretical photodiode responsivity of 1.25A/W at 1.55µm wavelength (R = λ/1.24), thus demonstrating photocurrent gain (for example a responsivity of about 30A/W is obtained at −40dBm and 1V).
A strong dependence of the responsivity on the light intensity is observed. In particular, the photocurrent is proportional to the square root of the exponential of the BE voltage which, in turn, depends on the optical power. This is in agreement with the behavior of a bipolar transistor in high injection regime [20]. Simulations confirm that such regime occurs at optical power exceeding −30dBm depending on the carrier lifetime and on the optical absorption coefficient.
Concerning the speed of a phototransistor, this is limited by the charging times of the emitter and the collector and by the base transit time. Preliminary frequency response simulations show that the device speed is mainly dependent on the Ge carrier lifetime and on the relative emitter-base and collector-base dopings. Due to the foundry constraints we could not change the Ge doping and length (4µm was the minimum allowed feature size for the Ge layer) therefore, we expect low speed of operation from this first design. We expect suitable speed will be obtained optimizing the device geometry and doping levels. In fact, very encouraging published results suggest there are no fundamental limitations to prevent high speed operation in phototransistors [13,14].
3. Experimental results
We first characterized the phototransistors in terms of photocurrent versus optical power and applied voltage in floating–base configuration. In a second set of measurements we used two devices to realize a differential amplifier with resistive loads in order to evaluate the device performance in a differential configuration. We used a single mode fiber to couple the 1.55μm laser source into the chip through a TE grating coupler. We tuned the launched power in the range 0dBm ÷ −30dBm with a variable optical attenuator. A polarization controller was also used to optimize the input polarization in order to achieve the lowest insertion loss at the grating coupler. The last was estimated in −5dB while −1dB of extra loss was measured from the setup in the back to back configuration for a total insertion loss of −6dB. Finally, the voltage source and current reading were provided through a source-measure unit.
3.1 Single device characterization
Figure 5(a) shows the photocurrent versus applied voltage at different optical powers at the laser output, while Fig. 5(b) shows the corresponding responsivity.
Fig. 5 Current versus voltage at different input laser powers (a). Responsivity versus voltage at different powers (b).
The characteristics clearly demonstrate the transistor effect with the input power acting as the base current. The gain mechanism is demonstrated by the responsivities reported in Fig. 5(b) that largely exceed the value expected for photodiodes with the same absorption region. Responsivity is calculated as R = (Itot-Idark)/Popt, where Itot is the total measured current, Idark is the dark current and Popt is the loss corrected optical power. The device exhibits a remarkable maximum responsivity of about 230A/W at −30dBm optical power and 5V bias. Even at lower applied voltage the phototransistor exhibits large gain (e.g. 40A/W at 1V). The measured responsivity shown in Fig. 6(a) decreases significantly increasing the optical power, as expected from simulation results. Nevertheless, the responsivity at 5V is larger than 1A/W up to −6dBm (0dBm launched). Such gain dependence on the optical power is typically observed in phototransistors [14,16] and it is related to the light affecting the base potential as discussed in the previous section. In our device such effect occurs even at moderate powers due to the low doping concentration of the transistor Ge base.
Fig. 6 1.55µm responsivity versus optical power at different applied voltage (a). ION/IOFF ratio at 1.55µm versus applied voltage at different laser powers (b).
Figure 6(b) shows the ION/IOFF ratio calculated according to ION/IOFF (dB) = 20log(Itot/Idark). Despite the very large responsivity, at low optical power, the relatively high dark current severely affects the device sensitivity. The device exhibits an ION/IOFF exceeding 5dB only for launched optical power larger than −20dBm (2.5µW effective optical power at the photo-transistor). In order to improve the device sensitivity, the dark current should be reduced or cancelled. To this extent, the differential amplifier configuration offers two main advantages: the cancellation of the common mode dark current and a larger amplification through the amplifier load.
3.2 Differential amplifier characterization
The dark current cancellation is obtained resorting to a differential amplifier with offset compensation. Two photo-transistors are connected as depicted in Fig. 7(a) using a couple of resistive loads (Rload) and a trimmer (Rvar) in order to compensate the different dark currents of the devices. Only one device is illuminated. A fully integrated scheme will be object of a next fabrication.
Fig. 7 Differential amplifier circuit (a). Responsivity versus resistive load at 1.55µm and −30dBm power for different supply voltages (b).
Figure 7(b) shows the measured responsivity, in terms of V/W, versus the resistive load for a −30dBm launched power at 1.55µm and different supply voltages (Vs). All plots exhibit a maximum at 100kΩ. This is a consequence of the equivalent resistance of the device that is approximately about 100kΩ. In general a larger load corresponds to a larger gain, however when the load is larger than the equivalent resistance of the device the potential drop across the device is reduced thus lowering the bias and, by consequence, the responsivity. On the other hand, lower loads improve the bias on the device but produce lower amplification. In these conditions, the best trade-off arises from a proper matching of the load and the device equivalent resistance. Finally we evaluated the responsivity versus the launched optical power of the differential amplifier with a 100kΩ load at different supply voltages, results are shown in Fig. 8.
Fig. 8 1.55µm responsivity (expressed in V/W) versus optical power at different supply voltage for 100kΩ load.
The great advantage of the proposed scheme is the common mode rejection. The resulting improvement of the ON/OFF ratio will be limited by the drifts of the offset compensation. Preliminary attempts allowed a residual offset of about 10mV that resulted in a sensitivity improvement of about 15dB with respect to the single device. The proposed differential scheme can also be employed to overcome the extinction ratio problems due to the nonlinear responsivity of the device. In digital communication, in fact, the low state corresponds to a certain amount of optical power, low enough to make the transistor work in high responsivity regime and thus providing a non-negligible current signal. Unbalancing on purpose the differential couple could be a suitable solution for the elimination of such a low-level current signal.
4. Conclusions
In conclusion, we proposed a SiGe heterojunction bipolar phototransistor fabricated by adapting the available design kit of a commercially available silicon photonics foundry. The devices are measured at 1.55μm and exhibit maximum responsivity exceeding 232A/W and 42A/W at 5V and 1V bias, respectively. The device exhibits a power dependent photoresponse with the largest responsivity obtained in the μW range. Current-voltage characteristics are in good agreement with TCAD simulations. A significant increase of the device sensitivity can be expected resorting to the proposed differential detection scheme that provides a dark current cancellation.
Acknowledgments
We acknowledge the NSERC SiEPIC Program for the training and the component library.
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