Abstract

In order to compete with electronic solutions, parallel optical signal processing & computing require large smart pixel arrays that arc fast, reliable, and reasonably priced with uniform performance across the array. To meet all of these qualifications requires the use of a well developed foundry. This paper presents the design and experimental results of an 8×8 array of GaAs smart pixels in which the high speed input photodetectors, logic gates and output driver are monolithically integrated and fabricated by a foundry. Each pixel of the array is made up of three MSM photodetectors, one AND and one XOR logic gate composed of enhancement mode MESFETs and one four stage laser driver with bump bonding pads, all fabricated by Vitesse through the MOSIS foundry. Vertical cavity surface emitting lasers (VCSELs) will be flip chip-bump bonded to the completed Vitesse fabricated chips using a coplanar contacting technique similar to the one developed by Goossen et al. [1]. This technique allows the VCSELs to be stand alone devices embedded in each pixel and not occupy space remote to the optical processors, thus saving space and reducing interconnect capacitance. In addition, as the array size becomes large, electrically connecting the pixels with the remotely placed output devices becomes difficult and defeats the purpose of the optical interconnects.

© 1996 IEEE