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Abstract
Temporarily storing light occupies a pivotal position in all-optical packet switching network and microwave photonics. An integrated optical buffer with large capacity and low loss is demonstrated on a silica wafer. The optical buffer consists of four silica waveguide delay lines connected by five thermo-optic switches. With different switch combinations applied, related delay lines are selected to realize a different storage time in the buffer, and a storage time up to 100 ns with a 10-ns step size is implemented. By optimizing the fabrication process and introducing the offsets between straight and bending waveguides, the propagation loss as low as ~1.08 dB/m is achieved. This large-capacity and low-loss buffer enables broad applications in optical communications and microwave photonics.
© 2019 Optical Society of America under the terms of the OSA Open Access Publishing Agreement
1. Introduction
Optical buffer attracts a lot of attention in recent years, which plays a critical role in many research areas [1–5]. Optical buffer is used in the all-optical packet switching network to resolve optical packet contention, which not only simplifies the complicated system but also reduces power consumption [1–8]. And it matters in integrated microwave photonics (MWP) signal processors, which is applied to implement tunable broadband MWP filters [9,10]. With regard to beamforming of the integrated photonics radar, the buffer is intensively investigated to improve the scan angle and distinguishability [11,12]. Moreover, in the photonic analog-to-digital converter (ADC) [13,14], optical buffer assists to channelize the high frequency to achieve a high sampling rate.
As is universally known, besides the traditional ways to build the optical buffer by fibers, there are several approaches to realize the integrated optical buffer on chip, such as based on coupled ring resonators [2,15–18], photonic crystals [9,19], Bragg gratings [20,21], stimulated Brillouin scattering [22,23] and serial waveguides [24–26]. However, though tremendous advancements on different integrated optical buffers have been reported, very little optimization has been implemented on large time delay and low loss. Significantly, the lower loss means fewer requirements of amplifying components in the system, which could simplify the network link and reduce power consumption. The integrated optical buffer with large storage time could improve the ability to resolve the packet contention in optical packet switching network [3,7,27,28].
To the best of our knowledge, the integrated optical buffer on chip with the delay time up to 100 ns is only reported by Jane D. LeGrange, etc [24], which consists of two symmetric arrayed-waveguide gratings (AWGs) connected by hierarchic delaying waveguides and one wavelength converter based on two semiconductor amplifiers (SOAs). Although the applied AWGs could realize sharing of delay lines by multiple inputs and outputs, a tunable laser and a wavelength converter are necessary, complicating the system and increasing the cost to some degree. Even there is a report demonstrating ultra-low-loss waveguides based on a special fabrication process and waveguide structures [29]. The unique design makes it difficult to build some components like optical switches, which blocks the tunability of an optical buffer.
In this paper, an integrated silica waveguide optical buffer with a 1.08-dB/m loss and a storage time up to 100 ns is theoretically designed, delicately fabricated, and experimentally demonstrated. The proposed optical buffer is built on a silica-based planar lightwave circuit (PLC) platform. Setting the inclusive five thermo-optic switches on different states, 10-ns delay time per increment is attained. Because those switches connect with four spiral waveguides, which supply 10 ns, 20 ns, 30 ns and 40 ns delay time, respectively, the delay time can be tuned up to 100 ns by a 10-ns step size. Also, to guarantee the waveguide supporting the single-mode propagation only and reduce the loss of the bending waveguides effectively, optimization simulations are performed. The loss reaches 28.7 dB at the 100-ns delay, which could be smaller if ignoring the fiber coupling loss. At last, eye diagrams and signal-to-noise ratios (SNRs) at different delay time are obtained when the c.w. light modulated by a pseudorandom bit sequence (PRBS) with a length of 27-1 at 10 Gb/s propagates through the optical buffer. Notably, our proposed large-capacity and low-loss optical buffer shows the potential as a practical optical buffer in the optical packet switching network or a true time delay element in MWP.
2. Design and fabrication
The topological schematics of the proposed integrated optical buffer is shown in Fig. 1(a). Being built on a single chip, the whole structure is mainly composed of five Mach Zehnder Interferometer (MZI) thermo-optic switches based on directional couplers (DCs) and four step-by-step spiral waveguides. The five switches are fabricated with identical parameters, which could realize the switching by changing the injection currents of the heaters covered on the two arms of the MZI structure. The varying currents change the effective lengths of the waveguides, thus resulting in the variation of output power via different interference states. The four spiral waveguides are designed to provide 10 ns, 20 ns, 30 ns and 40 ns delays by applying stepwise increasing optical path lengths. Under this design, the presented optical buffer can offer the maximal temporal delay of 100 ns.
Fig. 1 (a) Architecture of the integrated optical buffer. (b) Simulation of the single-mode propagation condition. The insets show the cross-section of the waveguide and the single-mode field in the waveguide.
Based on silica PLC platform, the geometric construction of waveguides and the offset between spiral waveguides and straight waveguides are numerically simulated to realize the single-mode and low-loss propagation. As the cross-section of the silica waveguide with a heater shown in the inset of Fig. 1(b), the substrate is silicon, while the cladding and the core are silica with different doping, giving rise to the cladding refractive index is 1.4447 at 1.55 and the core refractive index is 1.4555 at 1.55 . Theoretically, the refractive index difference is 0.747%. And the heaters are made of Ti/Wu. These parameters are supplied by the fabrication foundry, SHIJIA, China. The single-mode condition is calculated in Rsoft, and the width of the core is selected to be 6 according to the simulation results in Fig. 1(b). Once the width of waveguide exceeds 6.39 , the first-order mode could be supported by the waveguide. As shown in the insertion, the fundamental transverse electric (TE) mode is simulated and the effective refractive index is 1.450386.
Considering the reports [30–33], light propagating in bending waveguides would suffer higher loss than light in straight waveguides. The loss of the light in the bending waveguide mainly includes two parts: one is the pure bending loss, which is determined by the radius of waveguide and refractive index difference; the other is the transition loss which is caused by the discontinuity of the waveguide curvature and mainly emerges in the connection area between the straight waveguide and the bending waveguide.
Given the former is limited by the circuit size and fabrication process, offsets between the straight and bending waveguides are designed to reduce propagating loss. Although an offset may cause scattering loss, the reduction of the transition loss due to a better field matching induced by a proper offset is higher than the increment of the scattering loss caused by the offset. As can be seen from Fig. 2(a), the identical offsets at the input port of the bending waveguide and at the output port of the bending waveguide are introduced, respectively. The simulation result shown in Fig. 2(b) indicates that the 0.26 offset between the straight waveguides and curve waveguides with 6000 bending radius is designed to achieve a maximum transmission efficiency up to 97%. The insert in Fig. 2(b) shows both the simulated electric field distribution of the fundamental mode with the optimized offset and the varying values of the transmission power along the pathway. The pathway monitor in Rsoft takes the overlap integral along the segment axis, where there are some fluctuations because of the light field jitter induced by the bending waveguide. Finally, the normalization value of the output power is 0.97.
Fig. 2 (a) The schematic diagram of the designed bending waveguide with offsets. (b) Simulated interaction between the offset values and transmission efficiency. The inset is the simulated electric field distribution of the fundamental mode and the monitor values with a 0.26-μm offset.
Figure 3(a) shows the layout of the proposed optical buffer. The inputs locate on the left edge while outputs are on the right side, which facilitates the package of the butting fibers. The electrodes connecting to the heaters cover on arms of MZI switches are arranged on the bottom edge of the chip with a 2-mm separation distance. The size of the chip is 63.5 mm × 65.6 mm, which could be further reduced if silica waveguides with a higher refractive index difference are employed. For applications in which a very compact buffer chip is required, silicon delay lines could be a good choice [34].
Fig. 3 (a) The schematic diagram of the tunable optical buffer layout. Waveguides, heaters, and metal pads are presented with different colors. The insertion shows details of the thermal-tuning MZI optical switch. (b) The scanning electron microscope (SEM) photo of the core waveguide cross section. (c) The SEM photo of the heating waveguide cross section. (d) Photo of the packaged module.
The designed optical buffer is fabricated on a silica-on-silicon wafer. The bottom cladding layer is first thermally oxidized, and then the corelayer is deposited by plasma-enhanced chemical vapor deposition (PECVD). Then, the core layer is annealed to be compact. To fabricate the waveguides, the core layer is etched by inductively coupled plasma (ICP). Next, the top cladding is deposited by PECVD and annealed to be compact. Moreover, after the heating electrodes and connecting wires are grown, thermal isolation tanks are etched, which are used to avoid affecting waveguides around the MZI optical switches.
The SEM photos of the cross sections of the general waveguide and heating waveguide are shown in Figs. 3(b) and 3(c), respectively. Notably, as shown in Fig. 3(b), the geometry of the waveguide is not exactly a square due to the fabricating process, leading to a great optical loss during the transmission. Figure 3(d) illustrates the packaged optical buffer module. Four fibers are end coupled to the input ports and output ports, which are fixed by ultraviolet (UV) glue. A printed circuit board (PCB) is used to transit injection currents from external electric sources to pads of the optical buffer chip. Owing to the convenient optical and electric packages, the designed optical buffer becomes an easy-to-use module.
3. Experimental results
Table 1 lists the switch voltages of the thermo-optic switches in the optical buffer chip. Ideally, the switch voltages of different switches should be the same. However, because of fabrication-induced random errors, the switch voltages vary among different devices, from 8 V to 13 V. Thus, a voltage calibration is required before employing the buffer chip in the optical communication system. With the development of the fabrication process, device uniformity could be improved in the future.
Table 1. Switch voltages of the thermo-optic switches
We also characterize the switching speed of these thermo-optic switches on the chips. A square-wave driving signal is applied to one of those thermo-optic switches. The signal has a peak-to-peak driving voltage of 4 V around 3 V offset. The pulsewidth of the driving signal is 10 ms with a rise/fall time of 2.5 ns. Figure 4(b) shows the output of the switch whose rise and fall time is about 2.0 ms and 1.1 ms. The rise time is longer than the fall time because of the heat conduction, which will dissipate part of the heat before heating the waveguide to the switching temperature [35].
Fig. 4 (a) Input square-wave signal generated from the arbitrary waveform generator (AWG). (b) The output modulated optical signal with rise/fall time of ~2/1.1 ms.
The loss is measured under different delay time. A tunable laser at 1550 nm is used as the probe light source. Figure 5 characterizes the total loss of the buffer chip under different storage time by changing the switch configuration. The insertion loss of our buffer chip is ~6.5 dB, including coupling loss between the fibers and the waveguides as well as the insertion loss of the optical switches. As shown in Fig. 5, the optical loss rises proportionally with the increasing length of waveguide delay lines, reaching ~28.7 dB at 100 ns. We can easily calculate the propagation loss of SiO2 waveguide, which is 1.08 dB/m. The loss performance is much better than that of Bell Lab, University of Electronic Science and Technology of China, and University of Tokyo—1.5 dB/m, 1.7 dB/m, 2 dB/m, respectively [24,25,36].
To test the storage performance of the buffer chip, an experiment is performed as illustrated in Fig. 6. An optical carrier at 1550 nm emitted from a tunable laser is first fed into an MZM which is driven by a square-wave pulse generated by the AWG. The repetition period of the driven signal is 200 ns, twice as long as the maximum storage time, and its pulse width is ~10 ns.
Fig. 6 Experimental setup for delay measurements. AWG: Arbitary Waveform Generation (Agilent Technologies 81150A); EDFA: Erbium-Doped Fiber Amplifier (KEOPSYS); MZM: Mach-Zehnder Modulator (Oclaro AM-20); PD: Photo-detector (HP 11982A); OSC: Oscilloscope (Textronix DPO73304D).
The input pulse train is illustrated in Figs. 7(a) and 7(b) is the zoom-in view. Then the modulated optical signal enters into the EDFA for amplification. To measure the storage time of the optical buffer, a reference arm is required as shown in the experimental setup in Fig. 6. The states of the buffer chip are controlled by three voltage sources. By adjusting bias applied on these switches, the buffer chip can be switched among different data storage time. The output signals in the measuring and reference arm are detected by two PDs and monitored in a real-time OSC. As can be seen from Fig. 7(c), the detected waveforms at the output port under different storage time. All time delays are calculated based on the reference waveform, which is not presented here. As expected, the optical tunable buffer module has thedata storage capacity up to 100 ns with a 10-ns step size. Due to the increasing propagation loss, the signal-to-noise ratio (SNR) deteriorates at a long storage time accordingly. The SNR could be improved with the development of the fabricating process.
Fig. 7 (a) Input square-wave pulse train with a 200-ns repetition period. (b) Zoom-in of one square-wave pulse. (c) Output signals from the optical buffer under different buffer states.
The optical signal quality is demonstrated by the measured eye diagrams when a 10 Gbps 27-1 PRBS signal is applied to the intensity modulator. Figures 8(a)–8(d) show the eye diagrams at the delays of 10 ns, 40 ns, 70 ns and 100 ns, respectively. Apparently, the SNR of the signal suffers more degradation under larger buffer storage. The SNR decreases from ~10 to ~3 with the rise of storage time. Notice that only one EDFA is used in our test system. Hence, the output signal quality could be improved by adding another EDFA after the optical buffer chip.
4. Conclusion
In conclusion, we demonstrate a large-capacity and low-loss silica optical buffer, which provides a maximal data storage of 100 ns with a 10-ns step size. The optical buffer consists of four stepwise spiral waveguide delay lines and five thermo-optic switches, which are combined to realize a tunable delay from 0 ns to 100 ns. The optical buffer is fabricated on silica-based PLC platform. Waveguide offsets are carefully designed to reduce the mode mismatch between the straight and bending waveguides. The buffer chip qualifies a maximum delay of 100 ns with an on-chip insertion loss of 28.7 dB. The buffer chip is well packaged and can be used directly. In summary, the proposed large-capacity and low-loss optical buffer reveals excellent potential in practical applications for optical communications and microwave photonics.
Funding
National Natural Science Foundation of China (61535012, 61705217); National Key R&D Program of China (2016YFC0800504).
Acknowledgments
We thank SHIJIA, China for the chip fabrication.
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