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Abstract
A 32×32 100 GHz silicon photonic integrated arrayed waveguide grating router (AWGR) is experimentally demonstrated for dense wavelength division multiplexing (DWDM) applications. The dimension of the AWGR is 2.57 mm×1.09 mm with a core size of 1.31 mm×0.64 mm. It exhibits 6.07 dB maximum channel loss non-uniformity with −1.66 dB best-case insertion loss and average channel crosstalk of −15.74 dB. In addition, in the case of 25 Gb/s signals, the device successfully realizes high-speed data routing. The AWG router provides clear optical eye diagrams and low power penalty at bit-error-rates of 10−9.
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1. Introduction
Data centers (DC) and high-performance computers (HPC) continue to scale with extremely large data and work sets [1], requiring low-latency, high-throughput, and low-power data transmission links. Due to its inherent speed and energy advantages, optical interconnect technology is widely used [2,3]. Furthermore, all-optical wavelength routing provides signal routing from any input port to any destination port, thus increasing capacity and flexibility in network architectures considered as a promising technology. There are many types of routers, but arrayed waveguide grating routers (AWGRs) are particularly attractive due to their potential for providing a low-latency, non-blocking interconnect when they are used as N$\times$N routers. In addition, it does not require additional power supply, reducing the energy consumption of HPC and DC. As of today, they have been successfully implemented in on-chip communication based on integrated silicon photonics [4–6], which offers significant advantages over standalone devices using fiber-based connections in terms of size, weight, and power consumption. All-to-all optical interconnect systems using 8$\times$8 AWGR based on silicon [5] and silicon nitride [7] has been demonstrated, however, the total system capacity is 8$\times$8$\times$25Gb/s$=$1.6 Tb/s. Few methods have been proposed to scale the capacity of the system [7]. The simplest strategy is to use AWGR with higher channel count, thus 32$\times$32 SiN AWGR has been demonstrated with a insertion loss of −2 dB and crosstalk of −10 dB. Another interesting approach is using many smaller port count AWGRs in different layer and combined them to provide the same interconnectivity offered by a single larger AWGR, with a price of increased complexity of connecting in different layer. To further increase the capacity of on-chip all-to-all connections, it is essential to investigate silicon AWGR with low insertion and crosstalk.
As of present, high-performance arrayed waveguide gratings have been developed on a number of materials, including silica [8,9], indium phosphide [10], polymer [11], silicon nitride [12], germanium [13], and silicon-on-insulator [14–16]. Due to the high index contrast between the silicon core and oxide cladding, the footprint of silicon AWG is greatly reduced. Furthermore, its fabrication is compatible with mature CMOS technology, enabling large-scale integrations with other functional devices while reducing costs considerably. In recent years, there are many AWGRs based on SOI platforms have already been demonstrated. A compact 16$\times$16 Si nanowire AWGR with a channel spacing of 3.2 nm was demonstrated in 2011 and exhibited complicated wavelength selective properties [17]. In 2014, Stanley demonstrated a 512$\times$512 silicon AWGR with a 25 GHz channel spacing, which is the highest channel count SOI AWGR with the highest resolution to date. However, the measured channel crosstalk rises to be as high as −4 dB [15], due to the difficulty of maintaining process uniformity in such a large area. Based on the comprehensive optimization technique, a novel silicon 8-channel AWGR was demonstrated with low insertion loss of 2.92 dB and low crosstalk of −16.9 dB [18]. The 8$\times$8 AWGR will be insufficient meet the demands of chip-scale HPC system, thus the SOI-based AWGRs with high channel counts and high resolution are required.
In this work, we present and demonstrate an SOI cyclic-AWG router with a high channel count and a channel spacing of 100 GHz based on our previous work [19]. By halving in channel spacing of 16$\times$16 200 GHz spacing AWGR, the device exhibits proper cyclic frequency properties for all 32$\times$32 port combinations with insertion losse ranging from 1.66 dB to 7.73 dB, and insertion loss non-uniformity of 6.07 dB, which potentially allows for 32$\times$32 all-to-all interconnection system. Measurements indicate that the channel crosstalk ranges from −12.18 dB to −18.44 dB. We also discussed the phase errors and resulting crosstalk for high resolution and high channel count silicon photonic AWG routers. For the purposes of evaluating the AWG router’s system impact, it is employed in a high-speed transmission system that launches a signal with a data rate of up to 25 Gbps into the router resulting in a total system capacity of 25.6 Tb/s. Clear optical eye diagrams and low power penalty are obtained due to the low device crosstalk.
2. Principle of operation, design and fabrication
Figure 1 shows the schematic diagrams of AWG and AWGR. The AWG consists of input and output waveguides, two free propagation regions (FPRs), and an array of waveguides with constant path length difference between adjacent waveguides ($\Delta L$). The input optical signal with different wavelengths will diffract and excite the arrayed waveguides when launched into the first FPR. After propagating through the arrayed waveguides, signals with different wavelengths have different optical path lengths. If light is expected to be strengthened by interference at the output waveguide, the optical path difference should be an integer multiple of the wavelength and satisfy the grating equation [20]:
where $n_s(\lambda )$ and $n_a(\lambda )$ are the effective indices of the FPR slabs and arrayed waveguides, respectively. $d_a$ is the pitch of the end of adjacent arrayed waveguides, $\theta _i$ is the propagation angle from one of the input waveguides, $\theta _o$ is the propagation angle toward one of the input waveguides, and $m$ is the diffraction order. In this way, the signals with different wavelengths focus on the different positions and enter into different output ports, thus enabling the function of wavelength (de)multiplexing, as shown in Fig. 1(a). However, if the input port is shifted ($\theta _i\neq 0$), the distribution positions of the diffraction channels are angularly shifted and may fall partially outside the sector covered by N output ports. By using a suitable grating period, a channel falling on one side of the output port’s angular sector will be replaced by a copy during the next diffraction order [21]. In this state, the FSR of the AWG is equal to N times the channel spacing, which is also known as an AWGR. It indicates that an N$\times$N AWGR supports N$^2$ interconnections if it is applied as an N$\times$N router in an interconnect architecture requiring the use of wavelengths N.
Fig. 1. Schematic diagrams of (a) a 1$\times$ N AWG with a fixed diffraction order m. (b) An N$\times$N AWGR (N$=$4) with two different diffraction orders m and m+1.
Due to the high index contrast between silicon core and silica cladding, silicon AWG suffers from high effective index fluctuations due to fabrication imperfections, including waveguide sidewall roughness, width fluctuation, and core thickness nonuniformity, resulting in a high level of crosstalk. The empirical expression for the relation between effective index fluctuation and crosstalk XT of the AWGs has been obtained as [22]
where $\delta n_a$ is the effective index fluctuation of the array waveguide and $L_{ctr}$ denotes the length of the middle waveguide in an array of waveguides. Therefore, the effective index variation caused by the dimension variations of arrayed waveguides should be kept at a small level to achieve superior performance in crosstalk. We select a 1-$\mathrm{\mu}$m-wide waveguide rather than a single-mode waveguide with a width of 450 nm (detailed analysis can be found in [19]). The height of top silicon layer is 220 nm for the technology platform used throughout this paper, so the arrayed waveguides have dimensions: 1 $\mathrm{\mu}$m $\times$ 220 nm and exhibit effective index variations of 2.19$\times$10$^{-4}$/nm and 3.7$\times$10$^{-3}$/nm. As a result, the sensitivity to the core thickness is much larger than its width, so wafer thickness uniformity is the most decisive parameter in controlling phase errors. If thickness varies by 1 nm, then the expected effective index variation is 0.0037, resulting in significant crosstalk as shown later in the paper.In addition, the insertion loss is also an important component for characterizing AWGR performance. The optimization techniques considered here are used to reduce the mode transition loss between the FPR and the arrayed waveguides and scattering loss of arrayed waveguides. The 70 nm-etched taper, linearly tapered from 2 $\mathrm{\mu}$m to 450 nm is used as a mode converter to minimize reflections at the interference of FPR. Besides, the gap between adjacent arrayed waveguides is set to be 0.2 $\mathrm{\mu}$m, which is limited by the fabrication process. Moreover, the 1-$\mathrm{\mu}$m-wide arrayed waveguide can reduce the scattering loss caused by the sidewall roughness by reducing the overlap between the mode field and sidewalls. The waveguides at bends have a width of 450 nm and a bending radius of 5 $\mathrm{\mu}$m to ensure single-mode transmission and a low propagation loss. As a compromise between crosstalk and insertion loss, we also adopted a shallow etching taper, but with a larger gap, 0.4 $\mathrm{\mu}$m, to minimize crosstalk. The detailed design parameters of a 32-channel 0.8-nm spaced rayed waveguide router are summarized in Table 1.
Table 1. Design parameters of the 32$\times$32 AWGR
Figure 2 shows the simulated spectral responses of the 32$\times$32 AWG router for the first channel input and 16th channel input, obtained by the 2D-Kirchoff diffraction formula. As can be seen in Fig. 2(b), the insertion loss begins to degenerate as the output channel approaches the margin channel. It is mainly because as the output channel goes outward from the center, the grating equation becomes slightly unsatisfied, expressed as the grating aberration value. In the center channel input, the aberration value is zero at the designed wavelength of 1550 nm, whereas it increases as the wavelength increases away from its center. Thus, the simulated non-uniformity is 2.02 dB with a maximum loss of −4.27 dB. Besides, due to the existence of large aberration for the edge output channel, the passband shape becomes deformed resulting in the deterioration of crosstalk. Similarly, when the light inputs from the first input channel, suffer severer aberrations for most output channels, the noteworthy deterioration of corresponding performance occurred as shown in Fig. 2(a).
Fig. 2. Simulated spectral response of the 0.8 nm channel spaced 32$\times$32 AWG router for the 1st channel input (a) and 16th channel input (b) respectively.
3. Fabrication and experimental characterization
The proposed device was implemented on Semiconductor Manufacturing International Corporation (SMIC) using SOI wafers with a 220-nm-thick top silicon layer and a 2-$\mathrm{\mu}$m-thick buried oxide layer to prevent light from leaking into the substrate, resulting in additional transmission losses. Microscope images of the fabricated Si AWG router device are shown in Fig. 3. The measured footprint of our device is 2.57$\times$1.09 mm$^{2}$ where the core size is 1.31$\times$0.64 mm$^{2}$. A reference waveguide is used to normalize the transmission spectrum of AWGR. The loss of reference waveguide is 10.75 dB including the coupling loss and straight waveguide loss.
Fig. 3. The microscope pictures of the AWGR. Insets: SEM images of the arrayed waveguides and bi-layer tapers near the FPR.
We measured the transmission spectrum of the device to characterize the performance of this device, including insertion loss and crosstalk. By using a polarization controller, the light from a tunable laser was converted to TE mode and then coupled into an input channel of the AWG via grating couplers. Finally, the output light is received by a power meter. Figure 4 shows experimentally measured results of the 32$\times$32 AWG router when the light inputs from the 1st and 16th channel respectively. Due to the difference between the fabricated and designed arrayed waveguide width, center wavelengths of the fabricated AWG router globally shifted toward shorter wavelength. For the central input, the central channel loss and non-uniformity are −1.96 dB and 3.47 dB, respectively. The crosstalk ranges from 17.71 dB to 13.65 dB. Besides, the wavelength routing performance of the device can be seen from the output responses of the same color under different input channels.
Fig. 4. Measured spectral response of the 100 GHz channel spaced 32$\times$32 AWG router for the 1st channel input (a) and 16th channel input (b) respectively.
Figure 5 shows the spectral response measured for all port combinations. The measured insertion loss varies from −7.68 dB to −1.66 dB, mainly because the side channels experience 3 dB extra loss compared to the center channel. Thus, there is a 6 dB extra loss of the combination of the side input and side output channel compared to the combination of the center input and center output channel. For our device, the minimum insertion loss is about 1.66 dB, which mainly comes from the large mode mismatch between the slab mode and arrayed waveguide mode due to a gap of 0.2 $\mathrm{\mu}$m between adjacent array waveguides, and it can be prompted by using a smaller gap at the junction. Furthermore, it illustrates that the center wavelength of AWGR deviates slightly from the designed value in Fig. 5. It is mainly related to the fact that AWGR uses three diffraction orders to realized cyclic-frequency routing.
Fig. 5. Heat map with measured insertion loss (a) and crosstalk (b) values of the fabricated 32$\times$32 AWG router.
As shown in Fig. 5(b), the crosstalk ranges from −12.18 dB to −18.44 dB, which is caused by phase errors that may come from fabrication tolerances especially for high resolution and high channel count silicon photonics AWG routers. As a result of 1-nm core width and thickness fluctuations, silicon waveguides show local effective-index fluctuations ranging from 0.000219 to 0.0037. In recent years, there has been studies investigating the manufacturing variations such as wafer-to-wafer and within-wafer variations [23,24], which also leads to the degradation of device performance in different batches of the same design parameters. However, for individual devices, the footprint is small and the thickness change is negligible and random width variations is more important. Figure 6 shows the calculated AWG passband with varying degrees of the effective variation $\delta n$. If we consider the corner cases in our fabrication tolerances, most of the effective index variation comes from width variations (1 nm) which translates to crosstalk levels −20 dB which is what we observe experimentally in Fig. 3. If $\delta n$ =3$\times$10$^{-5}$ can be achieved with 0.1 nm width variations, then crosstalk may be lowered to <−35 dB.
4. High-speed 32$\times$32 data routing demonstration
The experimental setup used to demonstrate data routing operation at 25 Gb/s is shown in Fig. 7. The tunable laser source (TLS) was employed to control the wavelength within the operation range of the AWG router according to the above-measured spectral response. The pulse-pattern generator (PPG) was used to drive the lithium niobate modulator (MOD) to generate the 25 Gb/s NRZ signals with a pseudo-random binary pattern (PRBS) length of $2^{31}-1$. The modulated signal was launched to the AWG router after passing through fiber amplifiers and filters. Then, the routed signals were collected at the respective output ports with different wavelengths. Finally, a bit-error-rate tester (BERT) and a digital communication analyzer (DCA) were used to measure the BER and optical eye diagrams. Polarization controllers were used to maintain proper signal polarization at different positions of setup. Based on a well-established design and laboratory conditions, grating couplers are used to coupler light from fiber, but we will be utilizing edge couplers to further evaluate the performance of the on-chip optical connection.
Figure 8(a) depicts the BER curves for data transmission at 25 Gb/s for the combination of the center/side input and center/side output channel, while Fig. 8 shows the BER curves for different port combination at the wavelength of 1529.35 nm. It can be seen that the bit error rate of $10^{-9}$ and successful data routing operation was achieved under the high-speed modulation of 25Gb/s. Meanwhile, the BER curves of the back-to-back (B2B) link without entering the AWG was measured as a reference to extract the power penalty. A maximum power penalty of 3.7 dB was observed from the BER curves for 1st input channel to 1st output channel for a BER value of 10$^{-9}$. Whereas, at the same driving data rate, the power penalty becomes zero for the combination of center input to center output port due to the lower crosstalk as Fig. 4 shows. The degradation of power penalty is mainly due to the deterioration of edge channel crosstalk performance. In addition, the eye diagrams of the PRBS31-modulated signal at 1529.35 nm are shown in Fig. 8.
Fig. 8. (a-b) BER measurements for the transmission with ddifferent port combinations. (c) Optical eye diagrams of the output signal modulated at 25 Gb/s with different port combinations.
In Table 2, we compare the basic characteristics of this AWGR with previous SOI AWG router demonstrations in different spectral bands. All measured insertion loss and crosstalk in the table are for the center channel.
Table 2. Comparison between state-of-the-art AWGR
5. Conclusion
In summary, we propose and demonstrate a high-performance 32$\times$32 silicon-based AWG router with 0.8 nm channel spacing. By comparing the performance of AWG routers with different channel spacing and different designs, it is found that the router has good cyclic rotation performance, the optimal insertion loss is 1.66 dB, the loss non-uniformity is 6.02 dB, and the average channel crosstalk is −15.74 dB. Besides, high-speed transmission experiments at 25 Gb/s have been carried out, revealing error-free operation. Clear optical eye diagrams and a maximum power penalty of 3.7 dB at a $10^{-9}$ BER are achieved. The proposed AWG router with high-resolution channel spacing will play an important role in the future applications of high-capacity on-chip optical interconnection.
Funding
National Key Research and Development Program of China (2022YFB2803100); Shanghai Sailing Program (22YF1456700); National Key Scientific Instrument and Equipment Development Projects of China (22127901).
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly avaliable at this time but may be obtained from the authors upon reasonable request.
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