1. Introduction

The staggering growth rate of data traffic within datacenters has posed a serious challenge for conventional electrical interconnection systems. Over the past few years this challenge has been the main driving force behind the development of a more capable technology, which is suitable for such short-reach applications. Integrated photonics is the most promising candidate offering an unparalleled solution to tackle the electrical interconnect bandwidth inadequacy. One of the key elements (other than the laser source and the photoreceiver) in an integrated photonic transceiver is the electro-optic (EO) modulator, which determines the ultimate achievable data rate in the communication link. For this reason, extensive research has been aimed at developing reliable, compact, low-power, and high-speed EO modulators that can be deployed at a reasonable cost. The existing low-cost silicon (Si) manufacturing ecosystem and the potential for monolithic integration with electronic integrated circuits have been the prime motivations for directing most of such research efforts towards the Si photonic platform.

Carrier dispersion offers a fast way to change the optical properties of Si, in particular its refractive index and optical absorption [1]. Carrier injection and depletion in a pn-junction device [2,3] and carrier accumulation in a capacitive device [4,5] are among the main mechanisms by which the carrier concentration in Si can be altered in a short time (<0.1 ns). In contrast to injection mode in which the lifetime (τ_c) of the excess (minority) carriers limits the speed of the process, the relaxation time of the electric circuit (τ = RC) plays the deciding role in the charge dynamics in cases of depletion and accumulation mechanisms [6,7]. Since it is rather easy to engineer the RC of the device such that τ ≪ τ_c, most of the current studies for high-speed EO modulation applications are focused on the depletion mechanism in devices with a reverse-biased pn-junction [8]. In a typical reverse-biased pn-junction-based modulator (with an abrupt doping profile at the junction) the junction capacitance (C_j) and resistance (R) of the device are mainly controlled by the doping levels (N) on the p and n regions such that R ∝ N⁻¹ and C_j ∝ N^1/2. In comparison to the depletion mechanism, the carrier accumulation mechanism (which is implemented by forming a capacitor with two Si layers separated by a thin dielectric layer) is less explored. A particularly noteworthy feature of the accumulation-based devices compared to their depletion-based counterparts is that the capacitance-per-area (C = ε_rε₀/t_o, with ε_r and t_o being the relative permittivity and thickness of the dielectric layer of the capacitor) of the structure can be readily designed by choosing the dielectric material (i.e., ε_r) and thickness (t_o), which are independent from the doping levels of the two Si electrodes. The flexibility in the choice of C allows for designing structures featuring extremely low-voltage (i.e., by choosing a large C) and or extremely high-speed (i.e., by choosing a small C) operation performance. A few EO modulators based on the accumulation mechanism have been demonstrated in resonance and interferometric architectures featuring an embedded metal-oxide-semiconductor (MOS) capacitor and operation speed of up to 3 Gb/s [4,5]. In these structures, a doped poly-Si (p-Si) layer is used as the top gate-electrode and a crystalline Si layer (separated by a dielectric layer) serves as the second electrode. In general, the use of p-Si in integrated optical devices is not desirable, since the scattering loss from the p-Si grain boundaries significantly affects their performance. Most notably the scattering loss degrades the quality factor (Q) of compact resonance-based devices.

In this work, we use a Si/SiO₂/Si multilayer material platform featuring crystalline Si layers to demonstrate a wideband (>10 GHz) accumulation-based modulator. The crystalline Si layers allow us to achieve a compact and low-loss (i.e., high-Q) microdisk resonator as the main building block of the device [9]. Our accumulation-based device platform can be extended to other optical materials in conjunction with Si in the form of a vertically-stacked heterogeneous structure to enhance the functionality of the overall integrated photonic structure. Such hybrid material platforms have been developed and exploited to demonstrate novel applications beyond the inherent capabilities of Si [10–13].

In many practical applications, the operational wavelength of the photonic devices needs to be precisely controlled. Unfortunately, in almost all resonance-based devices integrated on high-index-contrast material platforms, the designed resonance wavelength deviates from the actual one due to the fabrication limitations. The expected level of accuracy in resonance wavelength is invariably dictated by the precision of the fabrication technique in use. For example, the variation in resonance wavelength of a 4 µm-radius microdisk in the silicon-on-insulator (SOI) platform for operation around λ = 1550 nm can be as large as 0.5 nm [14]. To rectify this mismatch, both active and passive trimming techniques have been developed [15–18]. Due to their limited precision, passive trimming techniques have limited use compared to active approaches. Most of the active trimming techniques rely on the thermo-optic effect, and despite offering continuous trimming (i.e., high precision), they impose a serious challenge in terms of the overall power consumption of the device. We have previously shown that the resonance wavelength of a fabricated microdisk resonator on the Si/SiO₂/Si multilayer platform can be trimmed (i.e., corrected) by up to 1 nm (which is adequate for almost all practical applications) by applying a dc voltage between the two Si layers [12,19]. The unique self-trimming feature of this modulator is of great technological importance as it obviates the need for implementation of thermal-based trimming techniques; this in turn significantly reduces the overall power consumption of the device. In the following sections we introduce the architecture of our high-speed EO device (Section 2), provide details on the corresponding fabrication processes (Section 3), and discuss the dc and ac characterization results (Section 4). Final conclusions are made in Section 5.

2. Device architecture

The cross-section of the EO modulator device studied in this paper is shown in Fig. 1(a). The device comprises a small microdisk (radius (r) = 3 μm) optical resonator, a 450 nm wide access waveguide, and two focusing grating couplers, which are fabricated on a multilayer Si/SiO₂/Si platform. The thickness of the top and bottom Si layers is 110 nm each, and the middle SiO₂ layer is 70 nm thick (t_o). The access waveguide is placed 150 nm away from the microdisk to achieve near-critical-coupling through evanescent excitation. A 50 nm thick Si pedestal underneath the device provides access to the bottom Si layer for adding electrodes. The top and bottom Si layers are moderately doped (≈10¹⁸ cm⁻³) to reduce their electrical resistivity. Regions underneath the electrical contacts are heavily doped (≈10²⁰ cm⁻³) to achieve low contact resistance with Si. The cross section of the doping profile on the microdisk and the pedestal is shown in Fig. 1(b). The electrodes are deliberately placed far from the first radial whispering gallery mode of the microdisk to ensure negligible propagation loss due to metallization (see Figs. 1(b) and 1(c)). The optical electric field profile of the first radial TE mode of the microdisk (shown in Fig. 1(c)) is obtained numerically using a commercially available finite-element-method (FEM) software package (COMSOL). The two Si layers and the sandwiched SiO₂ layer in between form a capacitor, which extends all over the microdisk area. Application of a positive voltage (V) between the two metallic electrodes (and thus, between the two Si layers) results in the accumulation of oppositely charged carries on the top and bottom Si layers (q = C × V). In contrast to microring resonators, in microdisk architectures the optical field interacts with only one sidewall and hence the quality factor of the resonator will not be compromised unnecessarily. Although the use of microdisk architecture introduces excessive capacitance, tailoring of the doping profile in the modulator device can mitigate the issue of higher capacitance. As seen in Fig. 1(c), the optical intensity of the mode of interest is mainly concentrated within a distance of d ≈700 nm from the periphery of the microdisk and has negligible extent in the central part of the structure. Therefore, accumulated charges on the central part of the capacitor has negligible interaction with the optical mode. To distinguish between these two regions on the microdisk, we write the total capacitance of the structure (C) as the sum of two parallel capacitances, i.e., C = C_p + C_m. Here, C_p and C_m denote the parasitic capacitance (central region of the microdisk resonator) and the functional capacitance (region near the periphery of the microdisk with non-negligible optical field), respectively (see Fig. 1(b)).

 

Fig. 1 (a) 3D schematic of the cross section of the accumulation-based EO modulator on a multilayer platform. Two focusing grating couplers are connected to the terminating ends of the access waveguide (not shown) to facilitate the input/output light coupling during characterization (b) Cross section view of the designed doping profile on different layers of the device. The doping on the shaded area can be eliminated to reduce the effect of the parasitic capacitance (c) The corresponding mode profile (magnitude of the electric field) of the first radial transverse electric (TE, electric field parallel to the Si layers) mode of the microdisk resonator obtained around λ ≈1560 nm.

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The accumulated electrons (ΔN) and holes (ΔP) on the two Si layers around the optical mode (i.e., on the C_m capacitor) shorten the optical path length of the microdisk resonator through carrier dispersion property of Si (Δn = -(8.8 × 10⁻²² × ΔN + 8.5 × 10⁻¹⁸ × ΔP^0.8)), which ultimately results in a blue shift in the resonance wavelength of the microdisk [1]. The total operation bandwidth (f_cutoff) of the EO modulator is determined by the electrical relaxation time constant (i.e., τ_c) of the structure as well as the lifetime of photons in the microdisk resonator (i.e., τ_o) approximately through (1/f_cutoff)² ≈(2πτ_c)² + (2πτ_o)² relation [20,21]. If the total electrical resistance of the Si layers, ohmic contacts, and the electrical interconnects are modeled by a lumped series resistor (R), the electrical relaxation time constant will be given by τ_c = R × C. The lifetime of photons can readily be estimated through the Q of the resonant mode (τ_o = Q/ω, ω is the optical resonance frequency). Assuming that the switch times of the logic levels in the driving signal are much faster than the electrical response time of the structure (i.e., τ_c), the average power consumption of the device subject to a random bit sequence drive (i.e., equal likely 1-0, 1-1, 0-1, and 0-0 transitions) can simply be estimated through P = 1/4 × C × V² [22,23]. Note that the elimination of C_p can improve the electrical bandwidth as well as the power consumption of the device by a factor of r²/(r²-(r-d)²). In the device with the aforementioned dimensions, this factor is approximately 2.42. With the designed dimensions of the microdisk resonator shown in Fig. 1, the total capacitance of the structure is estimated to be ≈13.9 fF (capacitance per unit area of the multilayer Si/SiO₂/Si platform is approximately 0.49 fF/μm² with ε_r ≈3.9). Assuming that the total pad-to-pad resistance (i.e., R) of the structure is dominated by the resistance of the doped Si layers for the microdisk geometry, R can be approximated to be 760 ohm resulting in an estimated τ_c of ≈10.6 ps or equivalently an electrical bandwidth of ≈15 GHz. In comparison, the doping levels in the depletion-based structures are set around 1~2 × 10¹⁸ cm⁻³ to minimize the free-carrier optical loss associated with the dopants while achieving a decent carrier dispersion effect and low resistance. This choice would result in a junction capacitance of C_j ≈2 fF/μm² (assuming an abrupt junction profile) in such structures.

3. Fabrication process

The designed structure shown in Fig. 1(a) is fabricated on a multilayer platform prepared through direct (fusion) bonding [24] of two SOI wafers. In the first step, a thin layer of oxide (with targeted thickness of 35 nm) is thermally grown on the device layer of two commercially available Si-on-insulator (SOI) wafers with a 3 μm thick buried oxide (BOX) layer. In the next step the two SOI wafers are bonded together on the thermal oxide side and then the handle layer as well as the buried oxide layer of the top wafer is removed using a dry etching process. The details of this bonding process is explained in [25] and are not repeated here. The initial thickness of the device layer is chosen such that after oxidation and bonding, the total thickness of the sandwiched oxide is around 70 nm, and the thickness of each device Si layer is 110 nm. The microdisk resonator, the access waveguide, and the input/output focusing grating couplers are patterned by electron beam lithography (EBL using a JEOL JBX-9300FS system) with a 190 nm thick spin-coated hydrogen silsesquioxane (HSQ) layer (6% from Dow Corning) as the resist. The Si and the oxide layers are then dry-etched in an inductively coupled plasma (ICP) chamber (with Cl₂ chemistry) and a reactive ion etching (RIE) chamber (with CF₄ chemistry), respectively. A 55 nm thick pedestal is selectively left un-etched around the microdisk on the bottom Si layer through another EBL step using ma-N 2400 (Micro Resist Technology) electron beam resist. Figure 2(a) shows the scanning electron microscope (SEM) image of the access waveguide and part of the microdisk (tilt angle is 45°) where the (false-colored) blue and pink shaded regions correspond to the Si and SiO₂ layers, respectively.

 

Fig. 2 (a) Tilted SEM image of the gap region between the access waveguide and the microdisk resonator. False colors are used to accentuate the stacked Si (blue) and SiO₂ (pink) layers (b) Top view SEM image of the cladded device after metallization step showing the input/output waveguide, microdisk, and RF electronic pads. Pads are placed close to the microdisk (< 50 µm) to ensure electrically short connections to the device for f ≤ 50 GHz.

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The sample is then conformally coated with a thin (i.e., 10 nm) layer of blanket oxide using atomic layer deposition (ALD) to prevent ion channeling in the following ion implantation steps. Five ion implantation rounds are carried out successively for 1.25 × 10¹³ cm⁻² of 75As + at 380 KeV, 0.87 × 10¹³ cm⁻² of BF₂ + at 110 KeV, 1.25 × 10¹³ cm⁻² of 75As + at 50 KeV, 5 × 10¹⁵ cm⁻² of P + at 40 KeV, and 3.5 × 10¹⁵ cm⁻² of BF₂ + at 35 KeV. EBL-patterned PMMA (from MICROCHEM) layers are used in all implantation steps as the masking material. We use the SRIM software to estimate the required implantation energy for the chosen dopant species such that the resulting doping profile resembles the one shown in Fig. 1(b). Rapid thermal annealing at 950° for 10 minutes is used to electrically activate the implanted dopants. The sample is then cladded under 1 µm of SiO₂ deposited by plasma-enhanced chemical vapor deposition (PECVD). Two via holes are patterned using an EBL step and dry-etched with Cr as a hard mask to reach the bottom Si layer (on the pedestal) as well as the top Si layer on top of the microdisk. In the last step, Ti/Cu metals are sputtered and lifted off on a 3-µm thick layer of patterned PMMA with the aid of sonication bath. Figure 2(b) shows the SEM image of the device after the metallization step.

4. Characterization results

For both the dc and ac (or RF) characterization steps, the chip is mounted on a thermally controlled stage and fixed using a conductive double-sided adhesive tape. Two flat-cleaved single mode fibers (SMF) are used to couple light in and out of the chip with the aid of focusing grating couplers. The insertion losses of the two grating couplers and the propagation loss of the access waveguide are collectively measured to be 20 dB at 1560 nm. Since the goal of this paper is the demonstration of the modulation technique in the multi-layer structure, we did not perform a detailed optimization of the input/output coupler. SMF fibers are mounted on a stage equipped with manual xyz translation as well as tilt and rotation adjustments. We use a tunable laser source (Agilent 8164A) to launch continuous-wave (CW) light into the input SMF fiber. Input polarization is controlled with a manual polarization controller prior to the input grating coupler which couples the input light to the access waveguide. After coupling to the microdisk resonator the light in the access waveguide is coupled out of the chip and into the output SMF by the output grating coupler. In the dc characterization case, the output fiber is directly connected to a photoreceiver (PDB150C from Thorlabs) with 10⁴ (V/A) transimpedance gain.. In this experiment, the laser wavelength is slowly swept (i.e., 5 nm/s) from 1550 nm to 1570 nm, and the corresponding detected voltage recorded using a data acquisition card (DAQ from National Instrument) and PC. Figure 3(a) shows the measured normalized transmission spectrum for different applied dc voltages. The polarity of the dc voltage is chosen such that electrons and holes are accumulated on the n-type and p-type doped Si layers, respectively (referred to as positive polarity hereafter). As seen in Fig. 3(a) the linewidth of the resonance feature in the transmission spectrum is ≈0.45 nm (i.e., Q ≈3500) for no applied dc voltage (V_dc = 0). The resonance wavelength and its associated extinction change V_dc increases from 0 V to 20 V. The observed blue shift in the resonance wavelength and the change in the transmission extinction are attributed to the free-carrier plasma dispersion property of Si [1]. The accumulated free carriers slightly reduce the refractive index of Si, which in turn decreases the resonance wavelength. Moreover, the introduced free-carrier absorption (FCA) associated with the accumulated charges (Δα = 8.5 × 10⁻¹⁸ × ΔN + 6 × 10⁻¹⁸ × ΔP) [1]) gives rise to an increase in the total internal loss of the microdisk resonator. Thus, the observed increase in the resonance linewidth (or decrease in the Q) in the transmission plots for V_dc > 0 is a direct consequence of FCA. Note that the waveguide-microdisk coupling-Q (Q_c) is designed such that the resonance mode under study is initially under-coupled at V_dc = 0. As the applied voltage increases, the intrinsic Q (Q_i) gradually matches Q_c, and the waveguide-resonator structure is pushed toward the critical coupling regime. This effect is clearly reflected in higher on-resonance extinctions in the corresponding transmission spectrum at higher V_dc as shown in Fig. 3(a).

 

Fig. 3 (a) Transmission spectrum of the device in Fig. 2 for different applied dc voltages with positive polarity. (b) Measured shift in the resonance wavelength with respect to the applied dc voltage for positive (solid-blue curve) and negative (dashed-red curve) polarities.

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The blue and red plots in Fig. 3(b) show the measured shift in resonance wavelength as a function of V_dc with positive and negative polarities, respectively. Although the shifts for negative polarity V_dc follows the same trend as that with the positive polarity, the measured absolute resonance shifts are smaller in the former case. The lag in charge accumulation in this case can be readily explained by noting that the Si layers should first be depleted from the oppositely charged carries due to their initial doping (see Fig. 1(b)), which requires higher levels of applied voltage in the negative polarity case. This situation is comparable to the inversion condition in a MOS capacitor [26]. In addition, it is seen that for V_dc more than ≈12 V, the resonance wavelength changes linearly at ≈25 pm/V, which is in accordance with the numerical predictions. For V_dc less than ≈12 V the observed resonance shifts are smaller than what is predicated by a linear capacitor model. We attribute this to a non-zero flat band voltage (possibly due to the introduction of charged ions, and etc. during the fabrication process).

Figure 4 depicts the setup used for the high-speed ac characterization. The optical power collected from the device is boosted using an erbium-doped fiber amplifier (EDFA) (VG2020 from ADVA with a total fixed gain of 21 dB) to compensate for the losses, primarily coupling losses. A high speed photoreceiver (PT-40G from Picometrix) with a cutoff frequency of 36 GHz is used at the receiving end of the output fiber. The optical amplification together with a variable optical attenuator (Agilent 8156A) ensures that the signal to noise (primarily receiver thermal noise) ratio is maximized while maintaining a linear response of photoreceiver. . A programmable bandpass filter (Nistica Wavelength Selective Switch) with a 50 GHz passband is placed after the EDFA to suppress out-of-band amplified spontaneous emission (ASE) and associated noise i.e., signal-ASE and ASE-ASE beat noise. To detect and correct for any drift in the fiber/grating alignments during the experiment, the output optical power was constantly monitored via a 10/90 directional coupler. The output voltage of the photoreceiver is monitored both in the time domain and the frequency domain using a wideband oscilloscope (Agilent DCA-X 86100D) and an electrical spectrum analyzer (Agilent 8564EC).

 

Fig. 4 Schematic of the experimental setup for the high-speed ac measurement. DUT: device under test, BPF: band-pass filter.

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The EO frequency response of the modulator was determined by manually sweeping a sinusoidal excitation in 0.5 GHz steps from 0.5 GHz to 15 GHz. The voltage excitation is generated by an RF signal generator (HP 83650B). We use an electrical amplifier (SHF 806E, bandwidth 38 GHz) with a nominal power gain of 26 dB to boost the electrical RF power. High speed cables with 2.92mm connectors are used to deliver the electrical signal to a high-bandwidth probe (Cascade Microtech, Inc.) via a bias tee, which combines the RF signal with a dc voltage signal. We apply a 14 V dc voltage to bias the device in the linear regime (see Fig. 3(b)). The output RF power of the signal generator is calibrated such that the delivered RF power at the probe remains constant, i.e., 16 dBm, as the frequency is swept.

Figure 5 shows the measured EO frequency response of the device in the range of 0.5 GHz to 15 GHz. The 3-dB upper cutoff frequency of more than 10 GHz is clearly observed. The eye-diagram of the detected signal at 10 GHz is also provided in the inset of Fig. 5. The observed EO response rolls off slowly and generally follows the estimations of Section 2 with a 3-dB frequency of more than 15 GHz. However we also observe variations in the higher EO frequency response as shown by the two decreases in the response above 10 GHz. The origin of these drops is not clear but likely stem from impedance mismatches between the probe and device.

 

Fig. 5 The measured frequency response of the accumulation mode modulator demonstrating a 3-dB bandwidth greater than 10 GHz. The inset (left image) shows the detected signal with a sinusoidal drive at 10 GHz. The inset (right image) is the measured eye-diagram at 15 Gb/s with a 2¹⁵-1 long NRZ PRBS (quality factor of the eye diagram ≈3.8).

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We also studied the response of the device to a pseudo-random bit sequence (PRBS) at 15 Gb/s. The PRBS signal is generated via an SHF pattern generator and the SHF amplifier producing a peak to peak voltage ≈ 4 V. The corresponding measured eye-diagram is shown in the inset of Fig. 5. The modulation depth (MD) of ≈ 8 dB and insertion loss (IL) of ≈ 5 dB are estimated from the prior dc characterization (laser wavelength is 1560.8 nm). Note that by tuning the laser wavelength around the resonance wavelength, less IL can be achieved at the expense of lower MD. The wide open eyes and sharp rise times seen in inset of Fig. 5 clearly indicates that data rates of more than 15 Gb/s are achievable. The source of the jitter observed on the rise-time and fall-time transitions (see the eye-diagram in Fig. 5) again believed to be attributed to impedance mismatch. The rise and fall times evident in Fig. 5 are consistent with a device that is capable of handling data rates of up to 30 Gb/s.

The developed modulator provides the highest modulation speed to-date compared to other accumulation-based modulators. Although the speed of the device is comparable with other integrated modulators, its clear advantages are the self-trimming, and compactness. As explained in the device architecture section, the performance of the device can be significantly enhanced by optimizing the doping profiles on the device as well as increasing the optical Q of the resonator by rearranging the electrical electrodes such that the need for the Si pedestal region around the microdisk is eliminated. None of these optimizations were performed in the results reported here. Our calculations show that the speed of the device can be enhanced by a factor of r²/(r²-(r-d)²) = 2.4 by eliminating the parasitic capacitance (C_p) of the device. This can be achieved simply by containing the n-doping profile on the lower Si layer only around the optical mode (see Fig. 1(b)). Elimination of the parasitic capacitance will also result in a reduction in power consumption by a factor of more than 2. Note that the high operation bandwidth obtained in this device is partially achieved by compromising the modulation efficiency, i.e., through the use of a rather small capacitance. In addition, optimization can be done on the position of electrodes to reduce the ohmic resistance (R) of the device. Thus we have demonstrated a compact device architecture that is capable of modulation speeds in excess of 60 Gb/s with proper optimization.

5. Conclusion

In summary, we demonstrated here a small-footprint (≈30 µm²) Si microdisk high-speed (> 15 Gb/s) electro-optic modulator based on carrier dispersion in Si through the accumulation mechanism in a Si/SiO₂/Si material platform. The estimated power consumption of the device is 55 fJ/bit. The operation wavelength of the device can be trimmed by up to 1 nm by a dc voltage without increasing the overall power consumption. Speeds more than 60 Gb/s and power consumptions less than 27 fJ/bit can be expected in future only by optimizing the doping profile of the device and improved instrumentation. Moreover, enhancement of the Q of the resonator through material platform/geometry optimization can improve the IL and MD figures of merit. The unique flexibility in controlling the device capacitance allows for device designs benefiting from a very low-voltage or a very high-bandwidth operation. The device performance is quite promising for future generation of short-reach optical interconnects and networks.