1. Introduction

Photonic integration on silicon can provide low-cost high-performance optical interconnects by utilizing well-established silicon CMOS technologies. The silicon-on-insulator (SOI) platform has been widely used to build silicon-based photonic integrated circuits (Si-PICs) because a high refractive index contrast between the top silicon and buried oxide layers allows one to build compact Si-PICs with submicron silicon waveguides. However, technical challenges arise when the light has to be coupled to an optical fiber for off-chip communications due to a large mode mismatch. Out-of-plane coupling based on grating couplers have been intensively researched [1–5] and recently have achieved coupling losses below 1 dB for TE polarization with a 1 dB-spectral bandwidth of 30~45 nm [3–5]. For edge coupling, various approaches such as incorporating transformation optics [6, 7] and silicon inverted tapers [8–13] have been reported. Especially, the single-stage fiber couplers based on silicon inverted tapers demonstrated a coupling loss of less than 1 dB over a wide wavelength range, operating both for TE and TM polarizations, while they generally require a longer device length than the grating couplers [10–13]. However, the misalignment tolerance is limited to typically less than ± 1 µm for a loss penalty of 1 dB due to their small mode field diameters (MFDs) matching to lensed fibers [13], which is too stringent for low cost optical packaging. The MFD needs to be increased in order to improve the alignment tolerance, which requires an increase of the overall length of the coupler. In the single stage coupler, the taper length increases exponentially for adiabatic mode conversion [14]. In order to maintain shorter coupler size compared to the single stage coupler while still achieving increased MFDs, multi-stage taper structures have been demonstrated, which required rather complex processing steps such as high-temperature silicon overgrowth and 3D-polymer embossing process [15, 16].

This paper reports a fiber-to-chip coupler consisting of a 3-stage Si/SiON coupler for the edge coupling. The optical mode in the silicon waveguide is first evanescently coupled to a SiON waveguide overlaying the silicon inverted taper, and is subsequently expanded both horizontally and vertically through a double stage SiON taper. The proposed coupler scheme suggests an efficient coupling with a standard single mode fiber by increasing the MFD within a sub-millimeter device length. Furthermore, it enables simplified fabrication process consisting of conventional low-temperature dielectric deposition and dry etch process, which offers a viable solution for low-cost optical packaging with edge coupling scheme.

2. Device design and fabrication

Figure 1 shows a schematic illustration of the fiber-to-chip coupler which comprises three stages. In the first stage, the width of the silicon waveguide is tapered down to a narrower width below that required to support guided modes. In this stage, evanescent coupling from the silicon waveguide to the overlaying SiON waveguide takes place as the silicon waveguide mode is gradually deconfined. In the second stage, a SiON lateral taper horizontally expands the optical mode from the overlaying SiON waveguide. The third stage vertically expands the optical mode by incorporating upper layer with a top SiON taper where the taper width is linearly increased to the width of the bottom SiON waveguide. The SiON taper tip width of the third stage needs to be kept small enough that there is negligible optical field overlapped inside the tip region in order to avoid a mode mismatch loss at the junction of the second and the third stages.

 

Fig. 1 Schematic illustration of the fiber-to-chip coupler

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In order to achieve a high coupling efficiency with an affordable coupler length, simulations are performed with varying SiON waveguide dimensions and taper lengths using Fimmprop [17]. A silicon waveguide height, a refractive index of silicon and a refractive index of SiON layer were assumed to be 220 nm, 3.45 and 2.28, respectively. Figure 2(a) shows the transmission loss as a function of the silicon taper tip width in the first stage. The results suggest that a loss below ~0.1 dB for both TE and TM polarizations can be achieved with a width of the silicon taper tip less than 150 nm. Figure 2(b) plots the transmission loss as a function of the top SiON taper tip width in the SiON double stage taper. The width of the bottom SiON waveguide is assumed to be 10 µm. A SiON tip width less than 1.5 µm can yield a loss below ~0.1 dB for both TE and TM polarizations. The simulation reveals that the width of the top SiON taper tip does not have to be submicron size. This is because most of the optical mode is already confined in the bottom SiON waveguide. Moreover, the SiON taper tip is placed on the region where the width of the bottom SiON waveguide is tapered through the second stage, so that the mode overlap at the top taper tip is further reduced.

 

Fig. 2 Simulated transmission loss at the interfaces of (a) the first stage and the second stage (b) the second stage and the third stage as a function of taper tip width. Refractive index of the SiON layer is assumed to be 2.28.

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Figure 3(a) shows the transmission loss with various length of the silicon inverted taper, where the waveguide width is linearly tapered from 500 nm to 100 nm. The dimensions of the overlaying SiON waveguide were assumed to be 2 µm (W) x 3 µm (H). As shown in the figure, a silicon taper length longer than 200 µm is required for a transmission loss below 0.1 dB. As the dimensions of the overlaying SiON waveguide increase, the required length for adiabatic transmission increases dramatically up to 10 mm for a 8 µm x 8 µm SiON waveguide as shown in the inset of Fig. 3(a), which makes the single-stage coupler impractical for single mode fiber coupling. Figure 3(b) shows the transmission loss of the SiON tapers as a function of the taper length at the second and the third stages. Adiabatic mode conversion can be achieved with ~750 µm-long taper at the third stage, while ~70 µm-long taper is needed at the second stage for a transmission loss below 0.1 dB. The taper length at each stage can be further reduced by incorporating quadratic or exponential tapers [9]. The design parameters used in the fabricated devices are summarized in Table 1. Using the parameters listed in the table, the simulation of the full transmission between a silicon waveguide and a standard single mode fiber yields minimum coupling loss of 1.4 dB for both TE and TM polarizations.

 

Fig. 3 Simulated loss of (a) silicon inverted taper (b) SiON tapers the second stage and the third stage as a function of taper length. Inset of (a) is a required length for 0.1dB transmission loss as a function of overlaying SiON waveguide dimensions. Refractive index of the SiON layer is assumed to be 2.28.

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Table 1. Summary of dimensions of the fiber-to-chip coupler

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The fabrication process starts with a formation of silicon waveguides with dimensions of 500nm (W) x 220nm (H) by a Cl₂-based dry etch on a SOI wafer. Knife-edge technique [18] is employed to overcome a resolution limit of our I-line stepper (350 nm process node) in forming a sharp taper tip with a width of 50 to 100 nm. Once the silicon waveguides and the silicon tapers are formed, a 8 µm-thick SiON layer is deposited at 400 °C by plasma-enhanced chemical vapor deposition (PECVD). The refractive index of the SiON layer is measured to be 2.28 near 1550 nm wavelength with an ellipsometer, which is larger than the stoichiometric Si₃N₄ due to the presence of excess silicon in the film grown by PECVD [19]. Ar/CF₄-based dry etch process is performed to define the top SiON taper of the third stage with a height of 5 µm. Then, the second etch process follows to form other structures of the device including the overlaying SiON waveguide, the lateral SiON taper and the bottom SiON waveguide. The etch depth is controlled to be 2.5 µm such that a remaining 0.5 µm-thick slab can protect the silicon waveguide surface from unexpected dry etch damages. Finally, a top cladding of 4 µm-thick SiO₂ is deposited. Facets of SiON waveguides are mirror-polished for testing. A scanning electron microscope (SEM) image of the fabricated devices is shown in Fig. 4(a). The width of the silicon taper tip is ~100 nm as shown in Fig. 4(b). A slightly asymmetric shape with an increased side-wall roughness of the taper tip is due to resolution limit of the I-line stepper. Figure 4(c) shows the SiON taper tip with a width of ~400 nm. A SEM image of the cross section of the output SiON waveguide is shown in Fig. 4(d).

 

Fig. 4 Scanning electron microscope (SEM) images of the fabricated device. (a) fabricated device, the first and the third stages are partially shown in the image (b) silicon taper tip (~100nm tip width) (c) SiON taper tip (~400nm tip width) (d) Cross section of the output SiON waveguide.

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3. Experimental results

The devices are characterized by the insertion loss measurement based on the fiber-to-fiber coupling, of which details can be found elsewhere [9]. Polarization of the input light from a tunable laser is controlled by a polarization controller. Silicon waveguide loss is separately measured by the cut back method [20], with 0.43 dB/mm and 0.33 dB/mm for TE and TM polarizations, respectively. The propagation loss from a 2.5 mm long silicon waveguide is subtracted from the measured insertion loss to extract the coupling efficiency.

Figure 5 plots the measured average coupling loss with a cleaved single mode fiber as a function of the SiON output waveguide width. The error bars of the graph represent the variation of the coupling loss over 100 nm wavelength span. In the figure, the output SiON waveguide with dimensions of 10 µm (W) x 8 µm (H) shows a minimum coupling loss, where the output optical mode is closely matched to a single mode fiber mode with a MFD of ~10 µm. The average coupling loss for optimum waveguide dimensions is 4.2 dB and 3.6 dB for TE and TM polarizations, respectively, while overall average coupling loss stays less than 5 dB with a variation of the SiON waveguide width from 8 to 12 µm

 

Fig. 5 Measured coupling loss vs output SiON waveguide widths. The height of the SiON waveguide is 8µm.

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Figure 6(a) shows the coupling loss as a function of wavelength for the device with the optimum dimensions of the output SiON waveguide, 10 µm (W) x 8 µm (H). The coupling loss varies from 3.0 dB to 4.6 dB for TM polarization while it shows a variation from 3.7 dB to 5.1 dB for TE polarization over 100 nm wavelength span. The spectral variation of the coupling loss, ~1.6 dB, can be largely attributed to the multimode excitation in the SiON tapers. Simulation result in Fig. 6(b) shows that higher order mode excitation yields an off-centered mode at the SiON output waveguide and the center position changes with varying wavelength.

 

Fig. 6 (a) Measured coupling loss vs wavelength for TE and TM polarizations. The output SiON waveguide has a height and a width of 8 and 10 µm, respectively. (b) Simulated optical intensity at each stage with launching the fundamental mode of the silicon input waveguide at a wavelength of 1550 nm for TE polarization.

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Additional ripples from 0.2 dB to 0.4 dB in the figure are primarily due to Fabry-Pérot resonance from the reflections at the SiON waveguide facets.

The aforementioned experimental coupling loss is larger than the predicted value of 1.4 dB. Here, large side-wall roughness caused by our I-line lithography and etch processes, and the roughness of the SiON output waveguide facet due to mechanical polishing are major contributors to the observed loss of our coupler. Our fabricated silicon inverted taper has an asymmetry where one side of the taper has ~5 nm side-wall roughness. The scattering loss due to this large roughness of the silicon taper is estimated as ~1.3 dB by the analytical model of Ref [21]. Additional scattering losses from the SiON double-stage taper and the polished facet contribute to the rest of the measured coupling loss of ~1.7dB. These losses can be reduced by using the fabrication process in the advanced lithography node. Furthermore, the coupling loss can be reduced further down to less than 1 dB by suppressing the multimode excitation through optimization of the refractive index of a SiON layer.

Figure 7 shows the coupling loss increase with the misalignment of the output single mode fiber in horizontal (x axis) and vertical directions (z axis). The misalignment tolerance for 1 dB loss penalty is ± 2.2 µm, which is superior to that of single stage couplers as mentioned previously.

 

Fig. 7 Increase in coupling loss vs horizontal (x axis) and vertical (z axis) misalignment.

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4. Conclusion

A fiber-to-chip coupler consisting of a Si inverted taper and a SiON dual stage taper is demonstrated. Our cascaded taper coupler based on a simple fabrication process shows effective fiber coupling to submicron silicon waveguide with shorter device size and improved misalignment tolerance compared to single stage couplers. The improved misalignment tolerance can also extend the scope of its applications to other coupling schemes such as co-packaging external laser chips with Si-PICs. The results in this paper suggest that the coupling loss can be improved further by optimizations of the silicon inverted taper fabrication process as well as the refractive index of SiON tapers.