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Optical pulse controlled all-optical logic gates in SiGe/Si multimode interference

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Abstract

an optical pulse controlled all-optical logic gate with multifunctional performance and asymmetric structure has been designed theoretically in SiGe/Si materials using multimode interference principle. By switching the optical signal to different input waveguide ports, the device can function as OR, NOT, NAND, and NOR gates simultaneously or individually. It is a kind of promising device for next generation logic optical circuits, ultrahigh speed signal processing, and future Si-based all-optical integrated circuits.

©2005 Optical Society of America

1. Introduction

Ultrahigh speed signal processing is demanded for information superhighways and optical networks. However, the present signal processing speed based on optical-to-electrical and electrical-to-optical conversions cannot match the requirements of optical networks and wavelength division multiplexed systems. To match the requirements of optical digital information processing in future high-capacity optical networks and to avoid cumbersome optical-electrical-optical conversion, all-optical logic devices in any manner are necessary. Fortunately, recent years there are some works reported on all-optical logic circuits. But most of the reported works suffer from some certain fundamental limitations including big size, very few logic functions and even single function. Furthermore, many of the reported works are based on nonlinear optics [15] and have difficulty to be integrated with silicon-based optical devices.

Silicon-based all-optical logic gates will be a promising solution for their fabrication is compatible with very matured Si technology. Meanwhile, the multimode interference (MMI) principle is getting much more attention because the devices based on the MMI have many advantages such as simple configuration, compactness, and suitable for monolithic integration [610]. To combine the advantages of Si-based optical waveguide device and the MMI principle, in this work, an all-optical logic gate device for all-optical signal processing has been proposed and investigated theoretically.

2. Basic theory

2.1 Ridge waveguide of SiGe/Si

To get a large-scale single-mode ridge waveguide, height of the ridge waveguide should be larger than λ, and its width (2) and height (2) should satisfy [11]:

ab(q+4πb4πb)1+0.3(q+4πbq+4πrb)21(q+4πbq+4πrb)21
q=γ0n12n02+γ2n12n22

where γ 0,2=1 for HE mode, γ 0,2=(n 0,2/n 1)2 for EH mode, a, b, r, and λ are ridge width factor, ridge height factor, etching depth factor and wavelength in free space, respectively, and n 0, n 1, and n 2 are refractive index of cladding layer, guiding wave layer, and substrate, respectively.

2.2 Light distribution in MMI

In the multimode interference (MMI) region of the ridge waveguide, the light field ψ(x, y, z) can be expressed as [12]:

2ψx2+2ψy2+[2πn(x,y)λ]2ψ=β2ψ
ψ(x,y,z)=ν=0m1Cνψν(x,y)exp[j(ωtβνz)]

where z represents the propagation direction, x and y are longitudinal and vertical direction, Cν, ψν (x, y), n(x, y), and βν are the field stimulation coefficient, mode field function, refractive index, and mode propagation constant, respectively. ν=0, 1, 2, 3, ⋯, (m-1) is the mode numbers that the waveguide supports. Theoretical research has show that ψ(x, y, z+L) is the image of ψ(x, y, z) form at the position of z+L. It depends on the Cν and mode phase factor, exp[jν(ν+2)π(z+L)/3Lπ]. Thus, we know that the light field will repeat itself when L satisfy the following condition:

L=p(3Lπ)p=0,1,2,

where Lπ is the beat length of the two lowest-order modes.

3. Structure description

Figure 1 shows a schematic diagram of the proposed all-optical logic device. It consists of three sections: input section, central section and output section. The input section consists of three waveguides A, B and C, the central section is a MMI coupler and the output section consists of three waveguides 1, 2 and 3. All input and output waveguides are single-mode ridge waveguides and designed based on Eqs. (1) and (2) while the MMI section is designed based on Eqs. (3)(5) for operation at a wavelength of 1550 nm. Figure 2 shows the cross section of the single-mode ridge waveguide. Where w, h and d represent the width, height and etching depth of the ridge waveguide, respectively.

 figure: Fig. 1.

Fig. 1. Schematic diagram of the proposed all-optical logic gate.

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 figure: Fig. 2.

Fig. 2. Cross section view of the waveguide.

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4. Design consideration

The physical parameters of the device are designed by the following considerations. To easily couple light beam from a single-mode fiber with a diameter of 10 µm to each of the input waveguides, thickness (h) and width (w) of the all single-mode ridge waeguides are chosen to be 2.5 and 10 µm, respectively. Based on the large cross-section single-mode operation principle, an etching depth (d) of 1.0 µm is chosen for all waveguides corresponding to a 4% Ge content. To get multifunctional operation, in this design, the refractive index of the waveguides B and C are chosen to be 3.504 which is lower than the refractive index of other waveguides (n=3.507 for 1550 nm). The effective index method and the beam propagation method (BPM) method were used to analyze the behavior of the mode propagation and to determine the performance of the device. In our optimum design, the width of the MMI section is 38.4 µm and the length is 4980 µm. Spacing between the two single mode wavegudies is 4 µm. The total length of the device is 6500 µm with an input length of 492 µm.

5. Simulation and discussion

To realize logic functions, all incident light beams including optical control pulse with same wavelength (1.55 µm), phase, and polarization are used in the simulations of the devices. Figure 3 shows the simulated results based on the MMI principle and the BPM method. It can be seen from Fig. 3 that the device can operate as following four logic gates:

 figure: Fig. 3.

Fig. 3. BPM simulated optical fields with incident light beams having same wavelength and polarization.

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(1) OR logic gate: when the incident light beams are coupled into the input waveguides A, and/or B, and/or C individually or simultaneously, there are always optical signals in waveguide port 2 as shown in Fig. 3. In this case, the device operates as OR logic gates with an average insertion loss of 0.1dB. Table 1 shows the output signals in port 2 and the comparison with the simulation patterns in Fig. 3. It should be pointed out that 0 and 1 in Table 1 indicate without output signal and with output signal, respectively.

(2) NOT logic gate: when the incident light beam B is the input optical signal while the incident light beams A and C are the control pulses to control the output signals of output port 1 and port 3, respectively, the device operates as NOT logic gate as shown in Figs. 3(b), (d), (f), and (g). Tables 2.1 and 2.2 show the output signal in port 1 and 3, respectively, and the comparison with the simulation patterns in Figs. 3(b), (d), (f), and (g). Similarly, when incident light beam C is the input optical signal while the incident light beams A and B are the control pulses to control the output signals of output port 1 and port 3, respectively, the NOT logic operations of the device is as shown in Figs. 3(c), (e), (f), and (g). Tables 2.3 and 2.4 show the output signal in port 1 and 3, respectively, and the comparison with the simulation patterns in Figs. 3(c), (e), (f), and (g).

Tables Icon

Table 2.1. NOT Logic Gate

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Table 2.2. NOT Logic Gate

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Table 2.3. NOT Logic Gate

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Table 2.4. NOT Logic Gate

(3) NAND logic gate: when the incident light beam A is the input optical signal and the incident light beam B and C are the control pulses, respectively, the device operates as NAND logic gates as shown in Figs. 3(a), (d), (e), and (g). Table 3 shows the output signals in port 3 and the comparison with the simulation patterns in Figs. 3(a), (d), (e), and (g).

(4) NOR logic gate: when the incident light beam A is the input optical signal and the incident light beam B and C are the control pulses, respectively, the device operates as NOR gates as shown in Figs. 3(a), (d), (e), and (g). Table 4 shows the output signals in port 1 and the comparison with the simulation patterns in Figs. 3(a), (d), (e), and (g).

6. Conclusion

An optical pulse controlled all-optical logic gate with multifunctional performance and asymmetric structure has been theoretically demonstrated in the material system of SiGe/Si based on MMI principle. The device integrates four logical functions: OR, NOT, NAND, and NOR gates. The average insertion loss of the device is less than 0.2dB. The preliminary simulation results show that it would be a promising device with satisfying performance for all-optical logic circuits applications. It is also suitable for monolithic integration with other Si-based optical devices and photonic integrated circuits.

Acknowledgments

This work is supported in part by the National Natural Science Foundation of China (No. 90401008), the Program for New Century Excellent Talents in University, the Key Project of Chinese Ministry of Education (No. 104144), the Research Fund for the Doctoral Program of Higher Education (No. 20040558009), the Guangdong Provincial Science and Technology Program Foundation (No. 2003A1060201), and the Guangzhou Science and Technology Program Foundation (No. 2004Z3-D2051).

References and links

1. L. Brzozowski and E. H. Sargent, “All-optical analog-to-digital converters, hardlimiters, and logic gates,” IEEE J. Lightwave Technol. 19, 114–119 (2001). [CrossRef]  

2. M. Peccianti, C. Conti, G. Assanto, A. D. Luca, and C. Umeton, “All-optical switching and logic gating with spatial solitons in liquid crystals,” Appl. Phys. Lett. 81, 3335–3337 (2002). [CrossRef]  

3. T. Yabu, M. Geshiro, T. Kitamura, K. Nishida, and S. Sawa, “All-optical logic gates containing a two-mode nonlinear waveguide,” IEEE J. Quantum Electron. 38, 37–46 (2002). [CrossRef]  

4. H. Soto, J. D. Topomondzo, D. Erasme, and M. Castro, “All-optical NOR gates with two and three input logic signals based on cross-polarization modulation in a semiconductor optical amplifier,” Opt. Commun. 218, 243–247 (2003). [CrossRef]  

5. V. Van, T. A. Ibrahim, P. P. Absil, F. G. Johnson, R. Grover, and P. T. Ho, “Optical signal processing using nonlinear semiconductor microring resonators,” IEEE J. Selected Top. Quantum Electron. 8, 705–713 (2002). [CrossRef]  

6. B. J. Li, S. J. Chua, E. A. Fitzgerald, B. S. Chaudhari, S. Jiang, and Z. Cai, “Intelligent integration of optical power splitter with optically switchable cross-connect based on multimode interference principle in SiGe/Si,” Appl. Phys. Lett. 85, 1119–1121 (2004). [CrossRef]  

7. S. Nagai, G. Morishima, H. Inayoshi, and K. Utaka, “Multimode interference photonic switches,” IEEE J. Lightwave Technol. 20, 675–681 (2002). [CrossRef]  

8. S. L. Tsao, H. C. Guo, and C. W. Tsai, “A novel 1×2 single-mode 1300/1550 nm wavelength division multiplexer with output facet-tilted MMI waveguide,” Opt. Commun. 232, 371–379 (2004). [CrossRef]  

9. M. Takenaka and Y. Nakano, “Multimode interference bistable laser diode,” IEEE Photon. Technol. Lett. 15, 1035–1037 (2003). [CrossRef]  

10. M. W. Mohammed and E. G. Johnson, “Multimode interference-based fiber-optic displacement sensor,” IEEE Photon. Technol. Lett. 15, 1129–1131 (2003). [CrossRef]  

11. R. A. Soref, J. Schmidtchen, and K. Petermann, “Large single-mode rib waveguides in GeSi-Si and Si-on-SiO2,” IEEE J. Quantum Electron. 27, 1971–1974 (1991). [CrossRef]  

12. L. B. Soldano and E. C. M. Penning, “Optical multi-mode interference devices based on self-imaging: principles and applications,” J. Lightware Technol. 13, 615–627 (1995). [CrossRef]  

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Figures (3)

Fig. 1.
Fig. 1. Schematic diagram of the proposed all-optical logic gate.
Fig. 2.
Fig. 2. Cross section view of the waveguide.
Fig. 3.
Fig. 3. BPM simulated optical fields with incident light beams having same wavelength and polarization.

Tables (7)

Tables Icon

Table 1. OR Logic Gate

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Table 2.1. NOT Logic Gate

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Table 2.2. NOT Logic Gate

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Table 2.3. NOT Logic Gate

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Table 2.4. NOT Logic Gate

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Table 3. NAND Logic Gate

Tables Icon

Table 4. NOR Logic Gate

Equations (5)

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a b ( q + 4 π b 4 π b ) 1 + 0.3 ( q + 4 π b q + 4 π r b ) 2 1 ( q + 4 π b q + 4 π r b ) 2 1
q = γ 0 n 1 2 n 0 2 + γ 2 n 1 2 n 2 2
2 ψ x 2 + 2 ψ y 2 + [ 2 π n ( x , y ) λ ] 2 ψ = β 2 ψ
ψ ( x , y , z ) = ν = 0 m 1 C ν ψ ν ( x , y ) exp [ j ( ω t β ν z ) ]
L = p ( 3 L π ) p = 0 , 1 , 2 ,
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