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Abstract
In this paper, a 1 × 2 photonic switch is designed based on a silicon-on-insulator (SOI) platform combined with the phase change material (PCM), Sb2S3, assisted by the direct binary search (DBS) algorithm. The designed photonic switch exhibits an impressive operating bandwidth ranging from 1450 to 1650 nm. The device has an insertion loss (IL) from 0.44 dB to 0.70 dB (of less than 0.7 dB) and cross talk (CT) from -26 dB to -20 dB (of less than -20 dB) over an operating bandwidth of 200 nm, especially an IL of 0.52 dB and CT of -24 dB at 1550 nm. Notably, the device is highly compact, with footprints of merely 3 × 4 µm2. Furthermore, we have extended the device's functionality for multifunctional operation in the C-band that can serve as both a 1 × 2 photonic switch and a 3 dB photonic power splitter. In the photonic switch mode, the device demonstrates an IL of 0.7 dB and a CT of -13.5 dB. In addition, when operating as a 3 dB photonic power splitter, the IL is less than 0.5 dB.
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1. Introduction
Silicon photonic switches are the basic and critical building blocks that make up programmable photonic integrated circuits (PICs) and can be used to enable optical signal routing and switching. It has garnered significant attention due to its unique features, including high-density integration, compatibility with well-established complementary metal-oxide semiconductor processes, plasma dispersion, and thermo-optic effects [1,2]. The development of a photonic switch with large bandwidth, low loss, low crosstalk, low energy consumption, as well as compact structure will greatly facilitate the development of programmable PICs. The current structure of photonic switches is mainly based on the Mach-Zehnder interferometer (MZI) [3,4] or micro-ring resonators [5,6]. However, tuning the refractive index in the waveguide using free carrier dispersion effects [7,8] or localized thermo-optic effects presents challenges, resulting in minor refractive index variations of only 1 × 10−2 [9] or less. Consequently, this necessitates larger dimensions for the devices. In addition, the maintenance of such switching states requires continuous power input, which inevitably increases power consumption. It is a hindrance for low-power, highly integrated optical network systems.
In recent years, phase-change materials (PCMs) have gained increasing attention for their applications in programmable PIC devices, particularly for achieving nonvolatile photonic switches. Among the commonly used PCMs are Ge2Sb2Te5 (GST) [10–12], Ge2Sb2Se4Te1 (GSST) [13,14], Sb2Se3 [15,16], and Sb2S3 [17,18]. These materials exhibit significantly more significant refractive index changes in crystalline and amorphous states. Taking the widely utilized communication wavelength of 1550 nm as an example, both GST and GSST demonstrate refractive index changes greater than one in both crystalline and amorphous states [19,20]. Sb2S3 exhibits a refractive index of 3.308 in its crystalline and 2.718 in the amorphous state. Moreover, its light absorption capacity is less than 1 × 10−5 in the wavelength range of 850 to 1690 nm [21–23]. This absorption rate is significantly smaller than that of GST and GSST. These characteristics make Sb2S3 highly suitable for applications in programmable photonic devices. To achieve reversible switching between the crystalline and amorphous states of the PCMs, electrical heating [24,25] or laser heating [26] induced by fast thermal effects can be used.
Nonvolatile photonic devices utilizing PCMs have demonstrated their potential in various applications, including optical neural networks [27], photonic tensor nuclei [28], and optical computing [29]. However, these devices typically have limited bandwidths within 100 nm and relatively large device footprints, which limits their high-density integration and ability to process extensive data in PICs under certain conditions. Recently, inverse design algorithms have achieved various complex functions by continuously optimizing the refractive index distribution of the devices. Devices can be designed to be compact [30] and have huge bandwidths [31]. At present, many algorithms have been proposed, such as the direct binary search (DBS) algorithms [32,33], genetic algorithms [34], goal-first algorithms [35], deep learning [36,37], and so on. For instance, Jian Lin et al. introduced a polarization-insensitive higher-order mode-pass filter by leveraging a direct binary algorithm and a particle swarm optimization algorithm [38]. Additionally, Tahersima et al. used a deep neural network to design a pixelated distributed nanostructure with an area of only 2.6 × 2.6 µm2, enabling multiple power splitting ratios [30]. Furthermore, Wu, Jiagui et al. combined the GSST phase change material with the DBS algorithm to design a controllable optical power splitter with a compact footprint of only 2.4 × 3.6 µm2 [13]. These examples demonstrate the unique advantages of PCMs and algorithms in designing and optimizing silicon-based optical chips. There is considerable interest in combining PCMs with inverse design techniques to create on-chip single components with excellent performance and compact structures.
In this paper, a 1 × 2 photonic switch is designed, as shown in Fig. 1(a). The device exhibits a tiny footprint of only 3 × 4 µm2. In the wavelength range from 1450 nm to 1650 nm, the switch demonstrates an IL of lower than 0.7 dB and a CT of less than -20 dB. By setting different objective optimization functions, this structure can be optimized as a multifunctional device for the C-band. It combines the functionalities of a photonic switch and a 3 dB photonic power splitter into a single element, thereby significantly enhancing the integration density and flexibility of programmable PICs [39–41]. When operating as a photonic switch, it exhibits an IL of 0.7 dB and a CT of -13.5 dB within the wavelength range of 1530 to 1570 nm. On the other hand, when functioning as a 3 dB photonic power splitter, the IL is below 0.5 dB. Our devices are compact and offer excellent performance to meet the requirements of photonic integration.
Fig. 1. The structure of the device as well as a detailed drawing. (a) Schematic diagram of the proposed bandwidth 1 × 2 photonic switch structure. (b) Top view of the unoptimized photonic switch. (c) Cross-sectional view of the PCM region of the photonic switch.
2. Structure and design
Figure 1 shows the geometric configuration of the designed device based on the SOI platform, where the blue color represents silicon, the gray color represents silicon dioxide (SiO2), the orange color indicates crystalline Sb2S3 (c-Sb2S3), the yellow color indicates amorphous Sb2S3 (a-Sb2S3), and the green color represents the heater material. The structure of the proposed bandwidth 1 × 2 photonic switch is depicted in Fig. 1(a), which is similar to a symmetric multimode interferometer (MMI). In Fig. 1(a), the gray region consists of many SiO2 pixel units with a length of 160 nm, a width of 120 nm, and a height of 220 nm. The shape of the entire gray area is obtained by the DBS algorithm that performs the automatic optimization based on the figure of merit (FOM), where FOM describes the target of the optimization. For example, if we want to design the device as a photonic switch, the FOM should be set accordingly, and then the algorithm will constantly adjust the shape of the pattern made of SiO2 until the performance of the device reaches the FOM, that is, has an optical switching function. The structure contains two regions of Sb2S3 material with the same thickness (regions I and II). Sb2S3 is selected not only due to its minimal light absorption coefficient (lower than 1 × 10−5) but also its refractive index property [21,22]. In both the crystalline and amorphous states, the refractive index of Sb2S3 is lower than that of Si, which aids mode matching in integrated device configurations [42] and the deposition process is compatible with conventional complementary metal-oxide-semiconductor fabrication [16]. DBS algorithm makes the device more compact, and the Sb2S3 gives the device very low CT.
Figure 1(b) provides a detailed view of the device in the xy-plane before optimization using the DBS algorithm. In this figure, L and W0 represent the length and width, respectively, of the core part of the device, with values of 4 µm and 3 µm. W1 denotes the width of the input waveguide, which is chosen to be 500 nm, and the widths of the waveguides at the two output ports are also 500 nm. L1 = 1.08 µm is the distance between the two output ports. The Ws is 240 nm, which corresponds to the width of the PCM. Hs represents the distance of 600 nm between the two PCMs. This distance keeps them from thermal crosstalk during the phase transition. Figure 1(c) shows the yz cross-section of the PCM region, where both Hpcm and Hsi are 220 nm. Covering the top of the device with a layer of SiO2 200 nm thick to protect the PCM from oxidation and improve device durability [43,44]. To drive the PCM, an indium tin oxide (ITO) layer was chosen as the heater and the ITO film had n = 1.89 and k = 0.12 at a wavelength of 1550 nm [44]. The deposition of the PCM and the metal heater follows a conventional process [45,46]. ITO conductivity is an important parameter that affects heating efficiency, and post-deposition annealing is effective in improving the conductivity of ITO thin films [47,48]. Crystallization is achieved by heating Sb2S3 to temperatures higher than 573 K, while amorphization involves heating above its 823 K melting temperature and then rapidly quenching to freeze in the disordered amorphous state [22,49]. The thermo-optic refractive index of Si can be expressed as dn/dT = 1.86 × 10−4/K [9], if the room temperature is 300 K, the refractive index of Si changes to 9.73 × 10−2 when the phase transition temperature is 823 K. Due to the very compact structure of the devices we designed, small thermo-optic refractive index variations have a negligible effect on the devices.
The operational principle of the proposed 1 × 2 switch is as follows: the PCM region induces a spatially linear phase shift of the optical modes in the waveguide in addition to affecting the phase along the propagation direction (along the x-axis) [42]. When Sb2S3 is in the crystalline state, its effective refractive index increases significantly compared to amorphous, which causes a larger phase delay on the side where c-Sb2S3 is located. Accumulation of the localized phase shift in the PCM leads to a constructive interference that focuses the input fundamental mode in the multimode waveguide near c-Sb2S3. The focused input mode then partially converts the input fundamental mode to a higher-order mode, creating an effective asymmetric MMI [50], as shown in Fig. 2(a). We then optimize the device refractive index distribution using the DBS algorithm to direct the desired modes to a predefined output port. Specifically, when light is injected from the left port (Input), it interacts with the phase transition regions of the Sb2S3 material. In Region I, the Sb2S3 is in a crystal state, while in Region II, it is in an amorphous state. As a result, light is output from the upper port (Port 1). Conversely, when the phase change state is switched, region I becomes amorphous while region II becomes crystalline; the light is output from the lower port (Port 2).
Fig. 2. The effect of the device on optical transmission before it is optimized. (a) Normalized light-field maps of initial structures determined by sweeping parameters. (b) Transmittance of the top and bottom ports in the initial structure.
The width (Ws) of the phase transition material and the distance (Hs) between the initial structure's two-phase transition regions significantly affect the final optimization's outcome. Thus, it is crucial to determine suitable values for Ws and Hs before applying the DBS algorithm to optimize the device. We conducted simulations using a three-dimensional finite difference time domain (3D FDTD) method to accomplish this and chose the input light as TE0 mode with a wavelength range of 1450 nm to 1650 nm. By sweeping through different parameter combinations, we determine the initial structure of the device. We make the following definitions, T10 represents the light transmittance of port one, while T20 represents the light transmittance of port two. Our objective is to maximize T10 and the ratio T10/T20.
Based on the parameter sweeping results, it is evident that the highest values for T10 and T10/T20 occur when Ws falls within the range of 0.24 to 0.28 µm, while Hs should be around 0.6 µm. It is important to avoid selecting a too-wide Ws, as it would increase energy consumption and inhomogeneity in the phase transition [42]. Eventually, we determined Hs and Ws to be 0.6 µm and 0.24 µm, respectively. Figure 2(a) shows the normalized electric field intensity map obtained from the initial structure, where light can be seen to be output from the upper port when Region I is in the crystalline state and Region II is in the amorphous state. In Fig. 2(b), the blue curve indicates the transmittance of the device in the wavelength range of 1450∼1650 nm port one, which has a value of around 0.5. The red curve is the transmittance of port two of the device, which has a value near 0.
The device's core is 3 × 4 µm2, evenly divides the region into 25 × 25 pixel units, and optimizes it symmetrically (the axis of symmetry is the x-axis). Within the optimized region, the pixels possess binary dielectric properties (Si or SiO2), which correspond to logic states “0” or “1”, respectively. By setting Region I to the crystalline state and Region II to the amorphous state, the goal is to maximize the light output from the upper port while minimizing the output from the lower slave port. To quantify the performance of the device, we define the figure of merit (FOM) as follows:
where the FOM for the device is defined based on the transmittance (T1) of the upper port and the transmittance (T2) of the lower port. The pixel points are switched between Si and SiO2 and the FOM is calculated for both states, retaining the state with the smaller FOM. The optimization process continues until there is no further improvement in the FOM. Ideally, the FOM value is 0, indicating perfect performance.During the optimization process, the region filled with PCM is not included in the optimization region. The final optimized structure is shown in Fig. 1(a). We performed the simulations employing a mesh size of x = y = z = 30 nm to accurately capture the behavior of the device. The wavelength range of the light source used in the simulation is 1450 to 1650 nm. Figure 3(a) and Fig. 3(b) illustrate the electric field distribution when the light is output from the upper and lower ports. The IL and CT of the device are presented in Fig. 3(c) and Fig. 3(d), respectively. The IL of the device is less than 0.7 dB, and the CT is lower than -20 dB within a bandwidth of 200 nm. Specifically, at the wavelength of 1550 nm, the IL measures 0.52 dB, and the CT is -24.5 dB. The optical power at the output is almost the same after switching the output port since we designed the device with a completely symmetrical structure.
Fig. 3. A broadband 1 × 2 photonic switch. (a) and (b) show the normalized light field diagrams when light is output from port 1 and port 2, respectively. (c) and (d) are the IL and CT of the photonic switch, respectively.
The thickness of the PCM region of the designed device is 220 nm, and in practice, the thickness affects the energy consumption and the time required for the phase transition [22,42]. Therefore, it is essential to investigate the effect of PCM thickness on the device's performance. We conducted a study to analyze the impact of PCM thickness on the IL and CT of the photonic switch device in the C-band. To evaluate this, we considered PCM regions with thicknesses of 220 nm, 200 nm, 180 nm, 160 nm, and 140 nm, as shown in Fig. 4(b). We obtained the IL and CT of the device after optimizing each thickness case using the DBS algorithm. The final results are presented in Fig. 4(a) and Fig. 4(c), furthermore, Fig. 4(d) shows the different thicknesses represented by each color. Although the device performance gradually decreases with the reduction in the thickness of the PCM, we observed that the IL remains below 1 dB when the thickness of the PCM is approximately 160 nm. Similarly, the CT of the device remains below -13.5 dB when the thickness is at 140 nm.
Fig. 4. Effect of PCM thickness (Hpcm) on device performance. (a) and (c) represent the IL and CT in the case of PCM with different thicknesses in the C-band photonic switch, respectively. (b) is the yz plan view of the device: we will reduce the thickness of the PCM by filling the bottom with SiO2. Where HSi = 220 nm and Hpcm is reduced from 220 nm at 20 nm intervals to 140 nm. (d) shows the different thicknesses represented by each color.
In addition, the observation of Fig. 4(c) also reveals a significant increase in CT when the thickness of Hpcm is reduced below 200 nm. This may be related to the initial structure, which is only determined based on the swept parameter at the condition of Hpcm of 220 nm. Alternatively, we determine the thickness of the PCM to be 140 nm at the very beginning. Then, if we get the initial structure by sweeping the parameter and finally optimize it with the DBS algorithm, it will improve the device's performance in the 140 nm case. These findings can support practical applications and facilitate the development of efficient and reliable photonic switch devices.
Integrating multiple functionalities within a single component effectively enhances the flexibility and integration of optical chips. We can realize that the device switches from a photonic switch to a 3 dB photonic power splitter by changing the phase transition state of two symmetric regions. Specifically, when one phase transition region is crystalline while the other is amorphous, the device operates as a 1 × 2 photonic switch. Moreover, when both phase change regions are crystalline simultaneously, the device functions as a 3 dB photonic power splitter. This work contributes to developing advanced optical chips with integrated functionalities, enabling enhanced integration and flexibility for various applications. We performed the simulations in the valuable wavelength band from 1530 to 1570 nm. And utilized the DBS algorithm to optimize the device based on the following FOM:
The explanation of each parameter in the FOM is as follows. When the device acts as a 1 × 2 photonic switch, Region I in the phase transition is in the c-Sb2S3 state, and Region II is in the a-Sb2S3 state. T11 and T12 represent the optical transmittance of the up-port and down-port. To ensure an efficient and reliable switching function, T11 should be brought close to 1 (maximum transmission) and T12 close to 0 (minimum transmission). Furthermore, T21 and T22 represent the optical transmittance of the up-port and down-port TE0 modes, individually, when the device operates as a 3 dB photonic power splitter (where in phase transition Region I and II are in the c-Sb2S3 (state). T21 and T22 are denoted as the optical transmittance of the upper and lower ports, respectively, when the device is a 3 dB photonic power splitter. We made sure that T21 and T22 were equal to 0.5 as much as possible. The specific optimization flowchart is shown in Fig. 5.
After optimizing the device using the DBS algorithm, the final structure is obtained, as shown in Fig. 6(a). Currently, Region I is c-Sb2S3, Region II is a-Sb2S3, the light will be output from the upper port, and the light field diagram is shown in Fig. 6(b). Furthermore, if we encode the crystalline state as “1” and the amorphous state as “0”, then the code corresponding to this output state is “10”. The corresponding IL and CT of the device are presented as the blue curves in Fig. 6(i) and Fig. 6(j), respectively. The IL is approximately 0.7 dB, while the CT measures around -13.5 dB. If we want the light to be output from the lower port, we only need to set Region I to the a-Sb2S3 state (“0”) and Region II to the c-Sb2S3 state (“1”). The corresponding structure diagram is Fig. 6(c), the light field diagram is Fig. 6(d), and the code is “01”. At this stage, the device's IL and CT are depicted by the red curves in Fig. 6(i) and Fig. 6(j), respectively, with an IL of approximately 0.65 dB and CT at around -13.5 dB. The overall IL and CT in the two states are nearly identical due to the structural symmetry. The slight variations between the red and blue curves in Fig. 6(i) and Fig. 6(j) primarily arise from simulation errors.
Fig. 6. C-band switchable multifunction device. We coded c-Sb2S3 as 1 and a-Sb2S3 as 0; corresponding to the four cases “10”, “01”, “11” and “00 “ four cases. When the device acts as a photonic switch, (a) is a structural diagram of the output (“10”) from Port 1, and (b) is an optical field diagram in this state; similarly, (c) is a structural diagram of the output (“01”) from Port 2, and (d) is an optical field diagram in this state. When the device is used as a 3 dB photonic power splitter (“11”), (e) and (f) show the structure and optical field diagrams for this state, respectively. (g) and (h) show the corresponding structure and optical field diagrams when both phase transition regions are amorphous (“00”). In addition, (i) and (j) show the IL and CT of the two output ports of the optical switch, respectively. (k) shows the optical transmittance of the two ports of the 3 dB photonic power splitter, and (l) shows the total IL.
When regions I and II are switched to c-Sb2S3 (“11”), the device achieves a 3 dB photonic power splitter. Figure 6(e) and Fig. 6(f) illustrate the corresponding structure and light field diagrams. Figure 6(k) displays the transmission spectral curves of the two output ports, exhibiting a slight difference with a transmittance of approximately 0.45 for both ports. Figure 6(l) demonstrates that the total IL of the upper and lower ports is less than 0.5 dB. One point to be discussed is the effect of the device on the optical field when the PCM in both phase regions is in the amorphous state (“00”). The device structure and optical field distribution are shown in Fig. 6(g) and Fig. 6(h). It can be seen that the mode of the output port is no longer the mode of the input, and the reason is related to the FOM settings during the optimization. If the FOM is redefined, we can also develop more features for this device. For example, when the phase change region is at “00”, the optical output of both ports should be as low as possible to achieve an “off” effect. However, the optimization process will become more complex and require more optimization time.
We employed a coding scheme to represent the phase transition regions. Specifically, we assigned the value “1” to indicate the crystalline state and “0” to describe the amorphous state for the phase transition region. When the code is “10”, the corresponding light output is directed to up-port. Correspondingly, when the code is “01”, the light output is directed to down-port. Additionally, when the code is “11” the device functions as a 3 dB photonic power splitter. We cascade the devices to obtain the structure shown in Fig. 7(a). We designed the “Region 1” and “Region 3” cell structures combined by two curved waveguides [51] called “Region 2”. In this design, the phase transition regions of “Region 1” and “Region 3” namely I1, II1; I2, II2; I3, II3, are coded by “1” and “0” to indicate whether they are in the crystalline or amorphous state. Based on this configuration, we obtained 15 different results, as shown in Table 1. In the table, each Sum corresponds to a normalized output ratio. We can switch different codes to get the corresponding outputs, and conversely, we can also deduce the state of the phase change region inside the device by detecting the light at the output port. Besides, Fig. 7(b), (c), (d) and (e) are the light field diagrams of “111111”, “0101”, “111011” and “110101”, respectively. In the Table, each output case corresponds to a code. For example, for the input code “111111” the transmittance values for the four ports are 0.205, 0.201, 0.202, 0.205. For “0101” the transmittance values for the four ports are 0.011, 0.007, 0.021, 0.754, For “111011” the transmittance values for the four ports are 0.397, 0.011, 0.201, 0.198. For “110101” the transmittance values for the four ports are 0.022, 0.388, 0.017, 0.383. These results show that the proposed device has some logic capability after cascading, and has potential applications in programmable PICs.
Fig. 7. Structure and partial light field diagrams were obtained by cascading three devices. (a) is the structure of three single components in a cascade. (b), (c), (d) and (e) are the light field diagrams of “111111”, “0101”, “111011” and “110101”, respectively.
Table 1. Normalized truth table.
We also compared it with several previous reports about 1 × 2 photonic switches and photonic power beam splitters, as shown in Table 2. When the device is used only as a photonic switch, it has relatively low CT, a large operating bandwidth, and an ultra-compact structure compared to previous photonic switches. When the device acts as a multifunctional device, it has one more function than those devices with only one function. In addition, it is more compact than those devices with similar multiple functions.
Table 2. Comparison of previously reported 1 × 2 switches and power beam splitters with the proposed reconfigurable device.
Next, we investigate the effect of different fabrication errors on the switching and power beam-splitting functions of the device when used as a reconfigurable device. We simulated the effect on the device performance after varying the length and width (Δd) of the SiO2 pixel block and the width of the Sb2S3 material region (ΔD), and the results are shown in Fig. 8. When the reconfigurable device corresponds to the phase transition state “10” and the error between the length and width of the pixel block is Δd. It corresponds to IL as shown in Fig. 8(a) and CT as shown in Fig. 8(b) in the wavelength range of 1530 to 1570 nm. Corresponding to the phase transition state of “11”, the transmittance of the upper port of the device is shown in Fig. 8(d), and the transmittance of the lower port is shown in Fig. 8(e), the total loss of the two ports is shown in Fig. 8(f).
Fig. 8. The effect of different fabrication errors on the switching and power beam splitting functions. (a) and (b) denote the effect of pixel block size variation Δd on the photonic switch IL and CT, respectively. (c) Δd = 0 nm means that there is no manufacturing tolerance, shown by the red curve, Δd=+2 nm is an increase of 2 nm in both the length and width of the pixel block indicated by a blue curve and so on. (d), (e) and (f) denote the effect of pixel block size variation Δd on the upper port transmittance, lower port transmittance, and loss of the 3 dB optical power beam splitter, respectively. (g) and (h) show the effect of the PCM region change Δd on the photonic switch IL and CT, respectively. (i) ΔD = 0 nm means that there is no manufacturing tolerance, shown by the red curve; ΔD=+2 nm means that the width of both phase change regions increases by 2 nm, shown by the blue curve, and so on. (j), (k), and (l) show the effect of the PCM region variation ΔD on the upper port transmittance, lower port transmittance, and loss of the 3 dB optical power beam splitter, respectively.
When the reconfigurable device corresponds to the phase transition state “10” and the error in the Sb2S3 material region is ΔD. It corresponds to IL as shown in Fig. 8(g) and CT as shown in Fig. 8(h) in the wavelength range of 1530 to 1570 nm. Corresponding to the phase transition state of “11”, the transmittance of the upper port of the device is shown in Fig. 8(j), and the transmittance of the lower port is shown in Fig. 8(k), the total loss of the two ports is shown in Fig. 8(l). As can be seen from Fig. 8, the small tolerance of the width of the PCM region (ΔD not greater than 5 nm) has no significant effect on the device performance. Variations in the length and width (Δd) of the pixelated SiO2 have a slightly greater effect on the function of the device. In the simulations, the variation of Δd is not for a specific block of pixels, but for all of them. Therefore, the variation of Δd has a bigger impact on the performance of the whole device. In short, the proposed multifunctional devices have an IL of no more than 1 dB and a CT of less than -10 dB within Δd less than 5 nm; and the performance of the devices remains almost unchanged in all aspects within ΔD less than 5 nm.
3. Conclusion
We propose a 1 × 2 photonic switch by combining the Sb2S3 with the DBS algorithm. The compact device has a footprint of only 3 × 4 µm2 and demonstrates excellent performance. The IL is kept below 0.7 dB, and the CT is maintained below -20 dB in the 1450 to 1650 nm wavelength band. We also investigate the impact of the Sb2S3 thickness in the phase transition region of the device. The device performance degrades when the thickness is reduced from 220 nm to 140 nm. However, even at a thickness of 160 nm, the IL remains below 1 dB, and the CT remains below -13.5 dB at 140 nm. This indicates that the device maintains its functionality and performance within a specific thickness range. By employing different objective optimization functions, the proposed device can be optimized as a multifunctional device for the C-band. It integrates the functionalities of a 1 × 2 photonic switch and a 3 dB photonic power splitter into a single device. When the device is switched to a photonic switch, it achieves an IL of 0.7 dB and a CT of -13 dB within the wavelength range of 1530 to 1570 nm. On the other hand, when it is switched to a 3 dB photonic power splitter, the loss is less than 0.5 dB. This work provide a methodology for designing reconfigurable and multifunctional photonic components with small footprints and can be applied to enhance the integration density and flexibility of the programmable PICs.
Funding
This research was funded by National Key Research and Development Program of China (2022YFF0706005); National Natural Science Foundation of China (60907003, 61805278, 12272407, 62275269, 62275271, 62305387); Postgraduate Scientific Research Innovation Project of Hunan Province, China (CX20230009); Natural Science Foundation of Hunan Province (2022JJ40552).
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
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