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Abstract
We report for the first time, wavelength filters with reduced thermal sensitivity, based on a combination of crystalline silicon and hydrogenated amorphous silicon (a-Si:H) waveguides, integrated on the same silicon on an insulator wafer through a Complementary Metal Oxide Semiconductor (CMOS) compatible process flow. To demonstrate the concept, we design and fabricate Mach Zehnder Interferometers (MZIs) and Arrayed Waveguide Gratings (AWGs) based on this approach, and we measure thermal drift <1[pm/°K] in MZIs and <10 [pm/°K] in AWGs at C band.
© 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement
1. Introduction
Wavelength filters are key building blocks in modern optical transceivers. For example, 400G-FR4 and 800G-2FR4, which are expected to capture a significant fraction of the 100G/channel market within the next 1 to 5 years [1], require optical multiplexers and demultiplexers to combine and separate four 100G/λ Coarse Wavelength Division Multiplexing (CWDM) lanes.
In recent times, Silicon on Insulator (SOI) has become one the most promising platform for the implementation of optical transceivers because it allows integration of high-speed active and passive components monolithically, at low cost, with high yield, on the same substrate. One critical limitation of the SOI platform is the relatively large Thermo-Optic (TO) coefficient of silicon (TOSi=1.86e-4 [1/°K]) which results in a drift of the spectral response of around 90 [pm/°K] at C-band. This drift is not acceptable for most applications and several methods have been proposed to circumvent this problem.
The simplest solution is to actively control the PIC temperature using an integrated heater or a Thermoelectric Cooler (TEC) in the package. The problems with this approach are larger electrical power dissipation, reduced reliability, and added cost.
The other approach consists in implementing a filter with lower temperature sensitivity ideally close to zero (athermal). This can be achieved in multiple ways, but the most important requirement is that the process flow must be CMOS compatible.
One option to minimize temperature sensitivity, popular at the moment, is to use a platform that combines Si waveguides for high-speed active devices and SiN waveguides for passive filters. SiN has in fact a lower TO coefficient than silicon (TOSiN = 2.45e−5 [1/°K] at C-band [2]). The main drawbacks with this approach are the added process complexity, and the excess insertion loss and polarization dependent loss introduced by the transitions from Si to SiN waveguides and back.
One other option to minimize temperature sensitivity is to use a cladding material that has opposite TO coefficient with respect to silicon (negative), thus achieving a waveguide supporting an optical mode with a net $\frac{{{d_{neff}}}}{{dT}}$ close to zero. The main advantage of this solution is that it can be applied to both FIR filters (e.g. Arrayed Waveguide Gratings/Mach Zehnder Interferometers) and IIR filters (Ring Resonators).
Polymers exhibit negative TO coefficients and athermal filters based on negative TO polymer cladding have been reported in literature, e.g. [3]. But this approach has not gained much traction commercially, because the required core and cladding linewidth and thickness control are very tight, the long-term reliability is unclear, also integration in a CMOS process flow might be an issue.
TiO2, is another CMOS compatible material exhibiting negative TO coefficient, and athermal filters based on this approach have been reported in literature [4–5]. The issues with this approach, are that the TiO2 film properties are difficult to control, and the reliability is questionable because TiO2 films have pores close to the surface and these pores are prone to interact with contaminants, depending on pressure and temperature conditions [6]. Capping with SiN, mitigates this effect but also affects the TO coefficient [7].
If we narrow the scope to FIR filters (e.g. AWGs and MZIs) which covers many practical applications, then it is possible to minimize thermal drifts by using a combination of waveguide sections with different, but not necessarily opposite, TO coefficients.
This strategy can be realized for example by using two different silicon waveguide cross sections on the same filter, having different mode overlap with the cladding, that in turn results in different $\frac{{{d_{neff}}}}{{dT}}$ [8–10]. The approach works in sub-micron SOI platforms, where the mode has a significant overlap with the cladding, but not on a platform with strong mode confinement (e.g. thick SOI). The footprint of such a device scales inversely to the difference in TO coefficients between the two waveguides. Given the small difference in TO coefficients that can be achieved practically using the same material system, the footprint of this device might become large. Also, the different waveguide dispersions in the two different cross sections, limits the athermal bandwidth of the filter. Finally, the device is very sensitive to fabrication imperfections.
Instead of using two different waveguide cross sections on the same material system, one can use two different materials having different TO coefficients (at the expenses of additional process complexity). In [11] a combination of silicon and silicon nitride waveguides was used to achieve reduced temperature sensitivity of an MZI. The fabricated devices showed a thermal drift of -2.8[pm/°K], but large insertion loss and limited extinction ratio, attributed by the authors to the high propagation loss in SiN.
In this work we use this last approach, and we explore the use of hydrogenated amorphous silicon (aSi:H) in combination with silicon waveguides, to achieve athermal operation. aSi:H is very suitable for this aim because: i) it is CMOS compatible and integration in the process flow is straightforward, ii) it has low intrinsic optical loss at the wavelength of interest [12], iii) it has a large difference in TO coefficient with respect to silicon (that can be further tuned by process conditions [13]) thus allowing compact footprint of an athermal device, and iv) it has a refractive index very similar to silicon [14], so the Fresnel loss will be very small when integrated with silicon using butt coupling.
The paper is organized as follows. In the first section we review the basic design principles for achieving athermal operation. In section 2 we outline the process flow and process challenges. In section 3 we show experimental results. And in the last section we summarize the conclusions.
2. Athermal filter design
By using a combination of two waveguides having different TO coefficients $(\; \frac{{d{n_1}}}{{dT}} \ne \frac{{d{n_2}}}{{dT}}$) it is possible to achieve athermal behavior at first order.
For an MZI or an AWG with a desired free spectral range $\mathrm{\Delta }{\nu _{FSR}}\; $ it means designing the arms such that the differential delay lengths ${L_{1,2}}$ in materials 1 and 2 follow the simple equations:
where ${n_{g1}}$ and ${n_{g2}}\; $are the effective mode group indexes of the two waveguides having different TO coefficients.If $\frac{{d{n_1}}}{{dT}}\cdot \frac{{d{n_2}}}{{dT}} > 0$ Eq. (1) can be satisfied if $\Delta{L_1}\cdot \Delta{L_2}\mathrm{\;\ < 0}$. A simple visual representation of the condition $ \Delta{L_1}\cdot \Delta{L_2}\mathrm{\;\ < 0}$ is shown in Fig. 1 in the case of an AWG.
Fig. 1. Sketch of an athermal AWG based on two materials with different but not opposite TO coefficients. For each arm, material 1 sections are sketched in blue, and material 2 sections are sketched in red.
3. Process integration
aSi:H has been investigated for its use in integrated optics for more than two decades [15]. aSi:H exhibits high refractive index (close to Si) which allows tight light confinement and consequently reduced device footprint. By adjusting the process conditions, it is possible to achieve a-Si:H films with low optical absorption [12], and TO coefficient larger than Si. Typical values for the TO coefficient reported in literature are in the range TOa-SI:H = 2.3e-4 [1/K] to TOa-SI:H=3.6e-4 [1/K] at C-Band at room temperature [13,16].
aSi:H is commonly deposited at low temperature (<400°C) by PECVD using a source gas mixture of SiH4 and H2. High deposition rates can be achieved, allowing thick layers to be grown with low stress [17].
One key factor to consider when designing the process flow is that the thermal budget after a-Si:H deposition is limited to <400°C. In fact, annealing of the aSi:H film at temperatures higher than 400°C causes the material to transition to polycrystalline phase [18], that has higher optical loss and lower TO.
Despite this limitation it is still possible to devise process flow alternatives for the integration of devices requiring large thermal budget, (e.g. Si or Ge diodes, that require implantation steps followed by high temperature anneal) with a-Si:H waveguides. A schematic example of such process flow is provided in Fig. 2, leveraging the low deposition temperature of a-Si:H, allowing back-end integration.
Figure 3 shows an example of front-end integration, that we used in this work, where no devices requiring a large thermal budget are integrated. In this case a single hard mask can be used to pattern aSi:H and Si waveguides at the same time, thus making the process self-aligned. Despite being more elegant, self-alignment is not a strict requirement when using a thick silicon waveguide platform as in this work. Thanks to the large mode size, the additional insertion loss and back reflection caused by misalignment between Si and aSi:H waveguides, induced by the lithography stepper, are in fact negligible.
4. Experimental results
To demonstrate the concept, we designed fabricated and tested:
- • A-thermal MZIs (Fig. 4(b)) based on a combination of a-Si:H and Si waveguides with target FSR=6 nm at 1550 nm. The differential delay lengths in Si and in a-Si:H simply follow from Eqs. (1) and (2) and are respectively ΔLSi=610um and ΔLaSi:H=-490um. And conventional MZIs based on Si waveguides only (Fig. 4(a)), with target FSR=8 nm at 1550 nm, to be used as reference. 1 × 2 and 2 × 2 Multi-Mode-Interferometers (MMI) are used to split and recombine the signals. The typical measured insertion loss for both 1 × 2 and 2 × 2 MMI splitters is <0.1 dB at C-band,
- • 1 × 4, 800 GHz channel spacing, athermal AWGs at C band based on a combination of a-Si:H and Si waveguides (Fig. 5(b)). The differential delay lengths in Si and in a-Si:H are respectively ΔLSi=94um and ΔLaSi:H=-78um. And conventional 1 × 4, 800 GHz channel spacing AWG at C band based on Si waveguides only, to be used as a baseline for performance comparison. (Figure 5(a))
The devices are fabricated on a 3um SOI platform. The process flow used to integrate the a-Si:H film, and to fabricate the devices is schematically described in Fig. 3. More details about the platform can be found in [19].
As shown in Fig. 5 the footprint of the athermal AWG increases by around 50% compared to the conventional Silicon AWG. The footprint of the athermal AWG can be reduced by adjusting the process conditions such to maximize the TO coefficient of a-Si:H [13]. (In this work, the thermo optic coefficient of the a-Si:H film is measured using ellipsometry over temperature, and is estimated to be TOa-Si:H = 2.3e-4 [1/°K].)
The devices have etched facets. Lensed optical fibers are used to couple light in and out of the chip. A tunable laser at C-band is used as light source to test the devices, followed by a programable polarization controller that allows to set the launch polarization to TE or TM. The signal transmitted by the device is detected by a power meter synchronized with the tunable laser. The PIC is mounted on a temperature-controlled stage, that allows fine tuning of the PIC temperature. The spectra of MZIs and AWGs are measured at different temperatures [25°C,50°C,75°C] for both polarizations [TE,TM] and the test results are reported in Figs. 6–7. On-chip reference waveguides are used to normalize the coupling loss between the lensed fiber and the etched facets.
Fig. 6. (a) Conventional MZI spectrum, measured at different temperatures. (b,c,d) a-Si:H/Si Athermal MZIs spectra measured at different temperatures and for different input polarization states
Figure 6(a) shows the spectrum of a regular MZI based on silicon waveguides, drifting by around 90[pm/°K] as expected. Figure 6(b), Fig. 6(c), Fig. 6(d) show measured spectra of athermal MZIs based on aSi:H/Si waveguides. The observed spectral drift is <1[pm/°K] for both polarizations across the wavelength band from 1500nm to 1600nm. From the measured Extinction Ratio (ER) on the athermal MZI (ER>20dB), it is possible to estimate that the inclusion of the aSi:H section results in an additional IL< 0.9dB for the athermal MZI. No spectrum degradation is observed on the athermal device compared to the conventional device.
Figure 7(a) shows the spectrum of a regular AWG based on silicon waveguides drifting by around 90[pm/°K], as expected. Figure 7(b) shows the spectrum of an athermal AWG based on aSi:H/Si waveguides. The observed channel drift with temperature is<10 [pm/°K] for both polarizations. The residual thermal drift can be further minimized by fine tuning the design of athermal AWG around the TO coefficient of the deposited a-Si:H film.
Fig. 7. (a) Conventional AWG spectrum measured at different temperatures. (b) a-Si:H/Si athermal AWG spectrum measured at different temperatures. (c) a-Si:H/Si Athermal AWG spectrum measured for different input polarization states.
By comparing the spectra of the conventional and athermal AWGs, it is possible to estimate that the inclusion of the aSi:H section results in excess IL < 1dB in the athermal case. No crosstalk degradation is observed in the athermal device compared to the regular device. Fig. 7(c) shows polarization independent operation of the athermal AWG. This can be attributed to the fact that the a-Si:H film has no built-in stress resulting in additional birefringence.
The excess insertion loss in the athermal devices can be broken down in two main contributions: a-Si:H waveguide loss and a-Si:H/Si interface loss.
Waveguide loss has in turn two components: intrinsic material and sidewall-induced scattering loss. Scattering loss is very low in our large SOI platform because the mode is mostly confined in the a-Si:H core, with limited interaction with the sidewalls. The a-Si:H intrinsic material loss can be minimized by adjusting the process condition. Minimization of a-Si:H waveguide loss has been discussed in detail in [12].
Interface loss can, be broken down into two contributions: Fresnel loss from butt coupling, and scattering loss. Fresnel loss is very small in this case, because Si and a-Si:H have very similar refractive index. (In this work the refractive index of the a-Si:H film is measured using ellipsometry and is estimated to be na-Si:H = 3.49). Scattering loss at the interface between the two different materials, is the main contributor to interface loss in this case, and is caused by surface roughness, voids, etc., and can be minimized by properly adjusting a-Si:H deposition conditions.
5. Conclusions
In this paper we propose for the first time the integration of a-Si:H waveguides together with silicon waveguides to achieve athermal optical filters, using a fully CMOS compatible process flow.
To demonstrate the concept, we designed fabricated and tested athermal MZI and AWGs at C-Band. We measured <1[pm/°K] wavelength drift on MZIs and <10 [pm/°K] on AWGs, for both polarizations, with small excess insertion loss IL<1dB and no major degradation in optical performance. To our knowledge, the values of thermal sensitivity reported in this work are the lowest reported to date in literature in an SOI platform, spanning a wide optical wavelength interval of [1500-1600]nm, a wide temperature range of [25–70]°C, without polarization dependance (Table 1).
Table 1. Performance Comparison
Disclosures
The authors declare no conflicts of interest.
Data availability
Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.
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