Open Access
Add to BibSonomyAbstract
We report the first monolithic integration of InGaAs channel field-effect transistors with InGaAs/GaAs multiple quantum wells (MQWs) lasers on a common platform, achieving a milestone in the path of enabling low power and high speed opto-electronic integrated circuits (OEICs). The III-V layers used for realizing transistors and lasers were grown epitaxially on the Ge substrate using molecular beam epitaxy (MBE). A Si-CMOS compatible process was developed to realize InGaAs n-FETs with subthreshold swing SS of 93 mV/decade, ION/IOFF ratio of more than 4 orders of magnitude with very low off-state leakage current, and a peak effective mobility of more than 2000 cm2/V·s. In addition, fabrication process uses a low overall processing temperature (≤ 400 °C) to maintain the high quality of the InGaAs/GaAs MQWs for the laser. Room temperature electrically-pumped lasers with a lasing wavelength of 1.03 µm and a linewidth of less than 1.7 nm were realized.
© 2017 Optical Society of America
1. Introduction
Metal interconnects act as a major performance limiter for data transport due to bandwidth and power consumption requirements of high performance computing systems [1]. Optical interconnects have been proposed as an alternative to metal interconnects owing to their potential to achieve higher speed, lower interconnect energy, and higher interconnect density as compared with metal interconnects [2–5]. The electrically pumped laser is one of the most promising light sources for optical interconnects. Significant efforts have been made to integrate standalone III-V semiconductor lasers using various bonding methods [6–9] and direct epitaxial growth [10–14]. Integration of semiconductor laser diodes with other high performance electronic devices could pave the way for advanced opto-electronic integrated circuits (OEICs) that have on-chip and inter-chip optical communications capabilities.
There have been attempts to integrate GaAs or Si field effect transistors (FETs) and lasers, as summarized in Table 1. Integration of AlGaAs/GaAs laser diode and GaAs metal semiconductor FETs (MESFETs) has been demonstrated by selective regrowth of GaAs MESFET layers on a laser, where the GaAs was grown directly on Si [15]. However, GaAs grown directly on Si usually has high threading dislocation and defect densities, leading to short carrier lifetimes and poor laser performance [18]. This defective layer growth is mainly caused by large mismatch in lattice constant and thermal expansion coefficient between Si and GaAs and polar-on-nonpolar epitaxy [19]. Recently, InGaAs nano-lasers have been integrated with Si metal-oxide-semiconductor FETs (MOSFETs) [17]. InGaAs nanopillars were grown directly on the gate (made of polycrystalline silicon) and the source/drain regions (made of (100)-Si) of transistors. However, only optically pumped nanolasers were realized.
Table 1. Reports of demonstration of integrated III-V semiconductor laser and FETs.
While integration of lasers with Si and GaAs FETs has been demonstrated, there are no reports on the integration of InGaAs n-FETs with lasers. InxGa1-xAs (x ≥ 0.53) channel MOSFETs are promising candidates for ultra-high speed and low power devices [20–24] owing to their superior transport properties. Integrating low power high speed InGaAs channel n-FETs and III-V electrically pumped laser on a common platform may hold promise for future OEICs.
In this work, we demonstrate the first monolithic integration of InGaAs FETs with lasers using direct epitaxial growth. As shown in the 3D schematic and optical microscope image of Figs. 1(a) and 1(b), respectively, InGaAs FETs and InGaAs/GaAs multiple quantum wells (MQWs) lasers are formed on a common Ge substrate. This is enabled by the growth of high-quality III-V laser and transistor layers on the Ge substrate using molecular beam epitaxy MBE. Our InGaAs FETs show good electrical characteristics with subthreshold swing SS of 93 mV/decade (at VDS = 0.05 V) and peak effective mobility of more than 2000 cm2/V·s. Electrically-pumped InGaAs/GaAs MQW lasers are also realized at room temperature with a linewidth of less than 1.7 nm and a threshold current density of 1.25 kA/cm2.
Fig. 1 (a) 3D schematic of the monolithic integration of InGaAs n-FETs with lasers. The lasers have InGaAs/GaAs QW core. (b) Optical microscope image of opto-electronic integrated circuit with multiple finger InGaAs FETs driving the laser.(c) Cross-sectional schematic of the fabricated InGaAs FET along the line A-A’ in (a). (d) Cross-sectional schematic of the fabricated InGaAs/GaAs laser along the line B-B’ in (a).
2. Materials growth and device fabrication
2.1. Materials growth
Layer structures for transistors and lasers are shown in Figs. 1(c) and 1(d), respectively. III-V layers were grown on a 6° offcut Ge (100) substrate. The substrate was first annealed in ultra-high vacuum at 650 °C to form double atomic steps for suppressing the formation of anti-phase boundaries (APBs), followed by the growth of 10 monolayers of GaAs using the migration-enhanced epitaxy (MEE) technique at 300 °C. Low temperature MEE step during initial GaAs nucleation also helps to reduce defects related to APBs. These defects arise due to polar and non-polar nature of GaAs and Ge, respectively [10,19]. A 500 nm n+-GaAs (ND = 5 × 1018 cm−3 contact layer was then grown at 580 °C. Three GaAs/AlGaAs superlattice layers were inserted to suppress propagation of threading dislocations (TD) from the Ga/Ge layers to an overlying 1.7 µm thick Al0.4Ga0.6As bottom cladding layer. The laser active region comprises three sets of In0.2Ga0.8As (8 nm)/GaAs (20 nm) quantum wells (QWs). The QW layers were sandwiched in a graded-index separate-confinement-heterostructure (GRINSCH) AlxGa1-xAs layer with 0.05 ≤ x ≤ 0.4 from the core towards the cladding. Subsequently, a 1.2 µm thick Al0.4Ga0.6As layer was grown as the top cladding. A 400 nm p+-GaAs contact layer (Be doped with NA = 5 × 1018 cm−3) completed the growth of the laser structures.
This was followed by the growth of 800 nm graded InxAl1-xAs buffer (0.1 ≤ x ≤ 0.52) to match the lattice constant of the In0.53Ga0.47As FET channel. Transistor layers include 15 nm In0.53Ga0.47As channel, 2 nm In0.52Al0.48As etch stop layer, and 30 nm n+-In0.53Ga0.47As cap layer with a doping concentration of 5 × 1018 cm−3. All transistor and laser layers can be clearly seen in the scanning transmission electron microscopy (STEM) image in Fig. 2.
Fig. 2 STEM image showing the complete stack grown on Ge substrate. Laser layers consist of InGaAs/GaAs MQW core, AlGaAs cladding and p+ and n+ GaAs contact layers. The InGaAs transistor channel layer is separated from the laser layers by an InAlAs buffer layer.
Figure 3(a) shows the measured and simulated X-ray diffraction (XRD) curves for the In0.2Ga0.8As/GaAs MQWs grown on a bulk GaAs substrate for the purpose of calibration. Figure 3(b) shows atomic-force microscopy (AFM) scan of n+-In0.53Ga0.47As cap layer on Ge substrate with a root-mean-square (RMS) surface roughness of 3.6 nm for a scan area of 5 µm × 5 µm.
Fig. 3 (a) XRD ω-2θ curves for the GaAs/InGaAs MQW on a GaAs substrate. Indium composition of 20% was obtained from the simulated and the measured data. (b) AFM image of the top n+-InGaAs surface showing RMS roughness of 3.6 nm with a scan area of 5 µm × 5 µm.
Photoluminescence (PL) measurements were taken for the InGaAs/GaAs MQW layer structure grown on the Ge substrate. To obtain the PL spectra for InGaAs/GaAs MQWs, the transistor layers and laser top contact and cladding layers were etched away. PL spectra for the InGaAs/GaAs MQWs at 8 K and 298 K are shown in Figs. 4(a) and 4(b), respectively, and the peak PL emission wavelengths are ~912 nm and ~978 nm, respectively. The difference in observed PL peak wavelengths at the two temperatures corresponds to an energy difference of 92.8 meV, which is mainly due to the change in the semiconductor bandgap E(T) with temperature T. The temperature dependence of bandgap can be calculated using [25]:
where, E(0) is bandgap at absolute zero temperature. By using the material parameters α (~4.8 х 10−4 eV/K) and β (~140 K) for In0.21Ga0.79As [26], the bandgap energy difference of ~97 meV was obtained, which is close to the value extracted from PL data.Fig. 4 Photoluminescence (PL) spectrum of InGaAs/GaAs MQW grown on the Ge substrate measured at (a) 8 K and (b) room temperature (298 K), respectively. Top transistor and cladding layers were etched using wet etch prior to the measurement.
2.2. Realization of transistor and laser integration
Transistors were fabricated using a metal-first process flow [27]. The sample surface was cleaned using acetone, IPA, and de-ionized water. The sample was then dipped in dilute hydrochloride acid (HCl:H2O = 1:3 v/v) solution to remove the native oxides and was immediately loaded in the sputter chamber to avoid any oxide layer formation between the n+-InGaAs layer and metal contact. Molybdenum (Mo) was deposited on n+-InGaAs as the source/drain contact metal owing to low contact resistivity of Mo on n+-InGaAs [28]. A thin layer of Tungsten (W) was deposited on top of Mo to protect it from oxidation during dry etch. Silicon dioxide (SiO2) was deposited by plasma enhanced chemical vapor deposition (PECVD) to serve as the hard mask. The transistor channel was defined using photolithography and SiO2 was etched using CHF3-Ar plasma based reactive ion etching (RIE) at room temperature. W and Mo in the channel region were etched using SF6/O2 based inductively coupled plasma (ICP) etching at 200 °C with SiO2 as the hard mask.
The n+-InGaAs cap layer was selectively removed by wet etch using adipic acid:H2O2 (25:6 v/v) solution which stops at the InAlAs layer. The sample was immediately loaded into an atomic layer deposition (ALD) chamber for high-k gate dielectric deposition. 6 nm HfO2 was deposited by ALD at 250 °C after a few cycles of trimethylaluminum (TMA) cleaning to remove native oxides from the InAlAs surface. Following the high-k deposition, Mo and W (W-on-Mo) were sputter deposited as the gate electrode. The gate was then patterned and metals were etched using SF6/O2 based ICP etching at room temperature with photoresist as the hard mask. Mesa isolation was done using wet etch in H3PO4:H2O2:H2O (1:5:40 v/v) solution. SiO2 was then deposited using PECVD at 350 °C to protect the transistors during laser fabrication. Again, dry etch was used to etch SiO2 and open the areas for laser fabrication. The InAlAs buffer was then selectively etched in those areas to stop at n+-GaAs (contact layer) using HCl:H2O (3:1 v/v) solution.
The laser waveguide was fabricated by a combination of wet and dry etch steps [29]. The laser diode was patterned using photolithography and III-V layers were etched using H3PO4:H2O2:H2O (2:1:10 v/v) solution to form the waveguide. This was followed by Cl2 plasma based ICP etch of III-V layers for the formation of laser facets at a temperature of 250 °C. Tilt-view SEM image of the dry etched facet of the lasing waveguide is shown in Fig. 5. This is a key step to achieve low damage, vertical and smooth laser mirrors. The threshold current and maximum output of the laser would be degraded by corrugation or contamination of the facets. Au/Ni/Au/Ge/Ni with thicknesses of 150, 20, 100, 25 and 5 nm, respectively, were deposited for N-contact followed by lift-off and annealing at 400 °C for 5 s. Benzocyclobutene (BCB) was deposited and patterned thereafter to serve as passivation and planarization material. After waveguide exposure, P-contact was formed by deposition of 250/50 nm thick Au/Ti metals and lift-off. The highest temperature used in the entire process flow was 400 °C to maintain the high quality of QWs and reduce the possible inter-diffusion of the QW layers.
Fig. 5 Tilt-view SEM image of the dry etched facet of the lasing waveguide after ICP etching, showing smooth vertical side wall.
3. Materials and electrical characterization
3.1. TEM analysis of integrated transistors and layers
The cross sectional TEM image in Fig. 6(a) shows the InGaAs n-FET with the raised source/ drain, channel, and the gate stack. ~15 nm thick InGaAs channel, ~1 nm InAlAs, and ~6 nm HfO2 can be clearly observed below the gate metal in the high resolution TEM (HRTEM) image of Fig. 6(b) with reasonably smooth surfaces. InGaAs/GaAs MQW laser diodes with the active MQWs core, AlGaAs cladding layers and top and bottom GaAs contact layers are shown in the TEM image of Fig. 6(c). HRTEM image in Fig. 6(d) clearly reveals three sets of distinct InGaAs (8 nm) and GaAs (20 nm) layers of the MQW laser active core.
Fig. 6 (a) TEM image of an InGaAs n-FET with raised source, InGaAs channel, and the gate stack. (b) HRTEM image showing gate metal, high-k HfO2, InAlAs, and channel with reasonably smooth surfaces. (c) TEM image of a complete laser with AlGaAs cladding layer and InGaAs/GaAs MQWs. (d) HRTEM of the QWs shows clear transition between InGaAs and GaAs.
3.2. Electrical characteristics of InGaAs n-FETs
Figure 7(a) shows the transfer characteristics of an InGaAs n-FET with channel length LCH of 4.5 µm. subthreshold swing SS is 93 mV/decade, and ION/IOFF ratio is more than 4 orders at both high and low drain voltage VD. In the output characteristics of the same device in Fig. 7(b), a drive current of 200 µA/µm was obtained at a gate overdrive VG ̶ VT of 1.5 V and VD of 1.5 V despite a large LCH of 4.5 µm and capacitance equivalent thickness CET of ~2 nm. Drive current is significantly affected by the large source drain series resistance RSD of ~4.7 kΩ·µm extracted from ID-VD curve of the same device. RSD can be reduced by boosting the n-type doping of the n+-InGaAs layer and reducing the contact metal sheet resistance.
Fig. 7 (a) ID-VG curves of an InGaAs n-FET with LCH of 4.5 µm showing SS of 93 mV/decade and ION/IOFF of more than 4 orders. (b) ID-VD characteristics of the same device in (a) showing ION of ~200 µA/µm at VG-VT and VD of 1.5 V despite a large LCH.
The effective field mobility was extracted using split C-V method for long channel device with LCH of 21 µm. The effect of series resistance was eliminated during extraction. From the plot of effective mobility (μeff) as a function of inversion carrier density (Ninv) in Fig. 8, a peak μeff value higher than 2000 cm2/V·s was achieved. At Ninv of 1 × 1013 cm−2, μeff is 900 cm2/V·s.
Fig. 8 Effective peak mobility of more than 2000 cm2/V∙s was achieved as extracted by split C-V method after eliminating the effect of source drain series resistance.
The cumulative probability plot in Fig. 9(a) depicts the distribution of threshold voltage VT. Threshold voltage was determined by using the maximum transconductance linear extrapolation method at low VD of 50 mV. Most of the transistors have a positive VT, as is desirable from a circuit point of view. The SS distribution plot in Fig. 9(b) shows that all devices measured have SS lower than 110 mV/decade, indicating decent electrostatic gate control, good gate stack quality of the InGaAs n-FETs, and good quality of the III-V layers.
Fig. 9 (a) Statistical plot of the threshold voltage shows tight distribution. Most of the devices have a positive VT. (b) All devices measured have SS lower than 110 mV/decade, indicating decent electrostatic control and gate stack quality of the transistors.
3.3 Electrical and optical characteristics of InGaAs/GaAs MQW lasers
Figure 10(a) shows a typical I-V curve of the laser diode with ION/IOFF ratio of more than 7 orders and low current in the reverse bias regime. The laser characteristics were measured in pulsed mode with pulse width of 5 µs and duty cycle of 5%. The light output power and voltage as a function of current are shown in Fig. 10(b). At a temperature of 5 °C, the 1 mm × 24 µm laser exhibits lasing characteristics with a threshold current of ~210 mA, which translates to a threshold current density of 875 A/cm2 . At room temperature, the threshold current density is ~1.25 kA/cm2 (not shown here).
Fig. 10 (a) The laser diode shows ION/IOFF ratio of more than 7 orders with low current in reverse bias regime. (b) Electrically-pumped lasing was successfully realized. The laser exhibited lasing characteristics at a threshold current of ~210 mA. The threshold current density is 875 A/cm2.
Figure 11 shows the output spectra of the same laser diode at 5 °C and 25 °C for single mode lasing currents of 248 mA and 330 mA, respectively. At room temperature, lasing occurs with wavelength of ~1027 nm. The lasing wavelength at room temperature is larger than that obtained from the room temperature peak PL emission wavelength (~978 nm). This could be due to heating of the laser core during lasing which decreases the band gap and increases the wavelength. The line width is less than 1.7 nm for both temperatures, indicating sharp boundaries of the quantum wells. This implies that no significant inter-diffusion between the InGaAs/GaAs QW layers occurred during the device fabrication. The key to achieve this was the development of a process flow with low thermal budget for fabricating transistors and lasers.
Fig. 11 Lasing spectra of the same laser diode in Fig. 10 at 5 °C and 25 °C. For both temperatures, the line width is less than 1.7 nm.
4. Conclusion
In conclusion, the first monolithic integration of InGaAs FETs and electrically pumped InGaAs/GaAs MQW laser diodes on Ge substrate was demonstrated using direct epitaxial growth. A low thermal budget process flow was developed to maintain the high layer quality of the InGaAs/GaAs QWs so that InGaAs FETs and lasers with good electrical and optical characteristics can be achieved. This work serves as proof of concept for integration of high speed III-V MOSFETs and III-V semiconductor lasers on a common platform. This is an important milestone in the development of advanced low cost, low power and high speed OEICs.
Funding
Singapore National Research Foundation, Competitive Research Program (Grant No: NRF-CRP6-2010-4); Singapore MIT Alliance for Research and Technology – Low Energy Electronic Systems (SMART-LEES) program (Grant No: R-263-000-C10-592).
References
1. J. A. Davis, R. Venkatesan, A. Kaloyeros, M. Beylansky, S. J. Souri, K. Banerjee, K. C. Saraswat, A. Rahman, R. Reif, and J. D. Meindl, “Interconnect limits on gigascale integration (GSI) in the 21st century,” Proc. IEEE 89(3), 305–324 (2001). [CrossRef]
2. D. A. Miller, “Rationale and challenges for optical interconnects to electronic chips,” IEEE Proc.88(6), 728–749 (2000). [CrossRef]
3. C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015). [CrossRef] [PubMed]
4. J. Liu, R. Camacho-Aguilera, J. T. Bessette, X. Sun, X. Wang, Y. Cai, L. C. Kimerling, and J. Michel, “Ge-on-Si optoelectronics,” Thin Solid Films 520(8), 3354–3360 (2012). [CrossRef]
5. D. A. Miller, “Device requirements for optical interconnects to silicon chips,” IEEE Proc.97(7), 1166–1185 (2009). [CrossRef]
6. A. W. Fang, H. Park, O. Cohen, R. Jones, M. J. Paniccia, and J. E. Bowers, “Electrically pumped hybrid AlGaInAs-silicon evanescent laser,” Opt. Express 14(20), 9203–9210 (2006). [CrossRef] [PubMed]
7. G. Roelkens, D. Van Thourhout, R. Baets, R. Nötzel, and M. Smit, “Laser emission and photodetection in an InP/InGaAsP layer integrated on and coupled to a Silicon-on-Insulator waveguide circuit,” Opt. Express 14(18), 8154–8159 (2006). [CrossRef] [PubMed]
8. G. Roelkens, L. Liu, D. Liang, R. Jones, A. Fang, B. Koch, and J. Bowers, “III‐V/silicon photonics for on‐chip and intra‐chip optical interconnects,” Laser Photonics Rev. 4(6), 751–779 (2010). [CrossRef]
9. L. Yuan, L. Tao, H. Yu, W. Chen, D. Lu, Y. Li, G. Ran, and J. Pan, “Hybrid InGaAsP-Si evanescent laser by selective-area metal-bonding method,” IEEE Photonics Technol. Lett. 25(12), 1180–1183 (2013). [CrossRef]
10. M. E. Groenert, C. W. Leitz, A. J. Pitera, V. Yang, H. Lee, R. J. Ram, and E. A. Fitzgerald, “Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers,” J. Appl. Phys. 93(1), 362–367 (2003). [CrossRef]
11. Y. Chriqui, G. Saint-Girons, S. Bouchoule, J.-M. Moison, G. Isella, H. Von Kaenel, and I. Sagnes, “Room temperature laser operation of strained InGaAs/GaAs QW structure monolithically grown by MOCVD on LE-PECVD Ge/Si virtual substrate,” Electron. Lett. 39(23), 1658–1660 (2003). [CrossRef]
12. T. Wang, H. Liu, A. Lee, F. Pozzi, and A. Seeds, “1.3-μm InAs/GaAs quantum-dot lasers monolithically grown on Si substrates,” Opt. Express 19(12), 11381–11386 (2011). [CrossRef] [PubMed]
13. A. Lee, Q. Jiang, M. Tang, A. Seeds, and H. Liu, “Continuous-wave InAs/GaAs quantum-dot laser diodes monolithically grown on Si substrate with low threshold current densities,” Opt. Express 20(20), 22181–22187 (2012). [CrossRef] [PubMed]
14. S. Chen, W. Li, J. Wu, Q. Jiang, M. Tang, S. Shutts, S. N. Elliott, A. Sobiesierski, A. Seeds, I. Ross, P. M. Smowton, and H. Liu, “Electrically pumped continuous-wave III–V quantum dot lasers on silicon,” Nat. Photonics 10(5), 307–311 (2016). [CrossRef]
15. T. Egawa, T. Jimbo, and M. Umeno, “Monolithic integration of AlGaAs/GaAs MQW laser diode and GaAs MESFET grown on Si using selective regrowth,” IEEE Photonics Technol. Lett. 4(6), 612–614 (1992). [CrossRef]
16. Y. J. Yang, T. G. Dziura, T. Bardin, S. C. Wang, R. Fernandez, and A. S. H. Liao, “Liao, “Monolithic integration of a vertical cavity surface emitting laser and a metal semiconductor field effect transistor,” Appl. Phys. Lett. 62(6), 600–602 (1993). [CrossRef]
17. F. Lu, T. T. Tran, W. S. Ko, K. W. Ng, R. Chen, and C. Chang-Hasnain, “Nanolasers grown on silicon-based MOSFETs,” Opt. Express 20(11), 12171–12176 (2012). [CrossRef] [PubMed]
18. T. Egawa, T. Jimbo, Y. Hasegawa, and M. Umeno, “Optical and electrical degradations of GaAs‐based laser diodes grown on Si substrates,” Appl. Phys. Lett. 64(11), 1401–1403 (1994). [CrossRef]
19. S. F. Fang, K. Adomi, S. Iyer, H. Morkoc, H. Zabel, C. Choi, and N. Otsuka, “Gallium arsenide and other compound semiconductors on silicon,” J. Appl. Phys. 68(7), R31–R58 (1990). [CrossRef]
20. J. A. del Alamo, “Nanometre-scale electronics with III-V compound semiconductors,” Nature 479(7373), 317–323 (2011). [CrossRef] [PubMed]
21. Y. Xuan, Y. Q. Wu, and P. D. Ye, “High-performance inversion-type enhancement-mode InGaAs MOSFET with maximum drain current exceeding 1 A/mm,” IEEE Electron Device Lett. 29(4), 294–296 (2008). [CrossRef]
22. X. Gong, S. Su, B. Liu, L. Wang, W. Wang, Y. Yang, E. Kong, B. Cheng, G. Han, and Y. C. Yeo, “Towards high performance Ge1− xSnx and In0.7Ga0.3As CMOS: A novel common gate stack featuring sub-400° C Si2H6 passivation, single TaN metal gate, and sub-1.3 nm EOT,” in IEEE Symposium on VLSI Technology (VLSIT) (2012), pp. 99–100.
23. J. Lin, D. A. Antoniadis, and J. A. del Alamo, “Impact of intrinsic channel scaling on InGaAs quantum-well MOSFETs,” IEEE Trans. Electron Dev. 62(11), 3470–3476 (2015). [CrossRef]
24. R. J. W. Hill, C. Park, J. Barnett, J. Price, J. Huang, N. Goel, W. Y. Loh, J. Oh, C. E. Smith, P. Kirsch, and P. Majhi, “Self-aligned III-V MOSFETs heterointegrated on a 200 mm Si substrate using an industry standard process flow,” In 2010 IEEE International Electron Devices Meeting (IEDM), pp. 6–2. [CrossRef]
25. Y. P. Varshni, “Temperature dependence of the energy gap in semiconductors,” Physica 34(1), 149–154 (1967). [CrossRef]
26. P. Bhattacharya, Properties of Lattice-Matched and Strained Indium Gallium Arsenide (IET, 1993), Chapter 3.2.
27. S. Yadav, K. H. Tan, K. Annie, H. Goh, S. Subramanian, K. L. Low, N. Chen, B. Jia, S. F. Yoon, G. Liang, X. Gong, and Y.C. Yeo, “First monolithic integration of Ge P-FETs and InAs N-FETs on silicon substrate: Sub-120 nm III-V buffer, sub-5 nm ultra-thin body, common raised S/D, and gate stack modules,” in 2015IEEE International Electron Devices Meeting (IEDM), pp. 2–3.
28. W. Lu, A. Guo, A. Vardi, and J. A. del Alamo, “A test structure to characterize nano-scale ohmic contacts in III-V MOSFETs,” IEEE Electron Device Lett. 35(2), 178–180 (2014). [CrossRef]
29. S. Y. Lee, K. H. Tan, W. K. Loke, S. Wicaksono, D. Li, R. Harper, and S. F. Yoon, “Dry etched waveguide laser diode on GeOI,” IEEE J. Sel. Top. Quantum Electron. 21(6), 264–269 (2015). [CrossRef]
