1. Introduction

Recent impactful advances in integrated photonics undoubtedly owe much to silicon (Si) and its associated enabling platform, silicon-on-insulator (SOI). Although Si has proven to be an indispensable element in many photonic systems, it is not the ultimate solution for all the challenges facing the photonics industry due to its intrinsic shortcomings. For example, Si suffers from higher loss due to two-photon absorption and free-carrier loss as compared to other CMOS-compatible materials such as silicon nitride (SiN) and silicon oxide (SiO₂). Moreover, in contrast to SiN and SiO₂, Si behaves nonlinearly once pumped with high optical powers both due to the two-photon abortion process and its comparatively large third-order nonlinear optical coefficient (χ³) [1]. Due to these shortcomings, the best reported propagation loss in Si waveguides (~10 dB/m [2,3]) is an order of magnitude higher than that in SiN waveguides (~0.1-2 dB/m [4]); and the best reported resonator quality factor (Q) fabricated on planar Si platforms is an order of magnitude lower than that on SiN (~3 × 10⁶ compared to ~3 × 10⁷, respectively) [3,5].

Unfortunately, no single-material platform offers all the required properties for realization of complex optical systems in which power, speed, insertion loss and device footprint are not traded off against each other. Hybrid material platforms, e.g., in form of multi-layer structures with different materials in different layers providing the necessary material properties (e.g., low-loss, reconfigurability, nonlinear optical effects, gain, etc.) for functional integrated photonic devices, provide an attractive solution to this challenge. An example is a hybrid Si/SiN platform in which low-loss devices (e.g., high-Q resonators and low-loss optical delay lines) are fabricated in the SiN layer; and the tunable devices are fabricated in the Si layer. A major requirement in using such hybrid platforms is the ability to efficiently couple light between different layers to avoid high overall insertion loss. Transfer of optical power between layers can be achieved through either evanescent or propagating field coupling. In the case of evanescent field coupling, efficient coupling can take place in a reasonably small footprint, provided that the two coupled layers are stacked in the vicinity of each other with the buffer layer thickness (if any) not exceeding few hundreds of nanometers. Such a coupling scheme has already been demonstrated in Si/SiO₂/SiN platform featuring 0.4 ± 0.2 dB waveguide-to-waveguide insertion loss with a 3-dB bandwidth of 20 nm, and 0.8 ± 0.2 dB insertion loss with a 3-dB bandwidth of 100 nm [6]. Moreover evanescent coupling from a Si waveguide in a lower layer to a high-Q (e.g., Q = 10⁶) SiN resonator in the top layer has been demonstrated [7]. The shortcoming of this scheme is the limited ability to control (specifically suppress) the coupling level between the two layers at arbitrary locations on the chip. On one hand, a thin buffer layer between the two layers is desired to achieve good coupling in short distances. On the other hand, a thin buffer layer can result in unwanted coupling (and consequently scattering/crosstalk) between the two layers at other locations. This issue poses an extra constraint on the layout of the devices on both layers. So in applications where dense integration is of concern, excessive optical scattering loss and interference are to be compromised against on-chip real estate and are sometimes unavoidable.

An alternative approach is to use a thicker buffer layer to alleviate the interference/scattering issue. The power transfer between the two layers in this scheme can be realized by incorporation of diffractive elements such as grating couplers or angled refractive micro-mirrors. The latter approach entails non-vertical etching (usually done through wet etching by relying on direction-dependent etch rate of the crystalline material), which makes the fabrication process more challenging for arbitrary substrates. Direct optical links have been demonstrated using angled micro-mirrors for chip-to-chip coupling on the Si platform; and a facet-to-facet insertion loss of 2.5 dB has been demonstrated [8,9]. On the other hand, the diffractive grating-based optical proximity coupling can be realized through conventional vertical dry etching and hence is more applicable for a wider range of materials. Utilization of diffractive gratings for interlayer/chip-to-chip power transfer has been demonstrated by various groups in different material platforms such as Si/SiO₂/Si and Si/SiO₂/SU-8 stacks with best reported insertion losses of around 1.5 dB and 6 dB, and 3-dB bandwidths of 51 nm and 41 nm, respectively [10–13]. Interlayer grating couplers on hydrogenated amorphous Si layers have also been demonstrate with a high efficiency of 83% and a 3-dB bandwidth of more than 40 nm [14]. Despite the unique advantages of the Si/SiO₂/SiN platform for future three-dimensional (3D) integrated photonic structures, there is still no report on efficient grating-based coupling scheme in this platform. A versatile coupling scheme with a systematic design approach for this material platform will be highly beneficial for the future integrated photonic systems.

In this paper, we report, for the first time, the design and implementation of single/double reflector-enhanced interlayer grating couplers for the Si/SiO₂/SiN platform with a rather thick buffer layer. Our simulations predict unprecedented high coupling efficiencies of about 89% and 64% (0.5 dB and 1.9 dB insertion losses, respectively) along with 3-dB bandwidths of 40 nm and 50 nm for single and double mirror structures, respectively. The fabricated single mirror device exhibits 2 dB insertion loss along with > 40 nm bandwidth. The proposed structure along with the design approach and simulation results are presented in Section 2. The fabrication process and the experimental results are discussed in Section 3. Final conclusions are made in Section 4.

2. Interlayer grating coupler design

Figure 1 shows the schematic of the proposed coupling structure in a 3D Si/SiO₂/SiN hybrid material platform. In this structure light from a ridge waveguide in the (lower) Si device layer is coupled to a SiN microring resonator in the higher layer through a SiN waveguide. The coupling between the two layers is achieved by using two gratings in the Si and SiN layers (see Fig. 1(b)). These two layers are separated by a relatively thick SiO₂ buffer layer to minimize the unwanted crosstalk coupling between the layers.

 

Fig. 1 (a) Schematic of the interlayer grating coupler enhanced with top and backside metallic reflectors to couple light from a Si waveguide (lower layer) to a ring resonator coupled to the access waveguide on the SiN layer (top layer). (b) Detailed cross section of the device around interlayer grating coupler. Each grating period is divided into a material (i.e., Si or SiN) part (called “bar”) and a groove part (called “gap”). The beginning of the top layer grating is displaced from that of the bottom layer grating by an amount called “displacement”. The gratings on the Si and SiN layers contain 18 and 24 grooves, respectively; and their widths and positions are found by the optimization process.

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To design and optimize the interlayer grating couplers in Fig. 1(b), several design parameters can be chosen. While the thicknesses of these layers (i.e., Si, SiO₂, and SiN) can be considered as design parameters, they are usually selected by practical considerations. For example, commercially available SOI wafers offer only a few options for the thicknesses of the SiO₂ buried oxide (BOX) and the Si device layers. In this paper we assume 3 μm and 250 nm for the thicknesses of the BOX and Si device layers, respectively, to comply with practical requirements. On the other hand, the thickness of the SiN layer is usually limited by its deposition technique. For higher quality SiN films, low-pressure chemical vapor deposition (LPCVD) is desired. Thicker SiN films are desired for realizing more compact devices (e.g., resonators and waveguides) with better field confinement. Yet in light of our deposition process, there exists an upper bound, dictated by the stress of the layer, beyond which stress-induced cracks appear all over the sample and render it unfit for high-yield fabrication. This upper bound, depends on the substrate (e.g., SOI here) and its thickness, the SiO₂ buffer thickness, the SiN deposition temperature, and the involved gas ratios in the LPCVD process [15]. Our initial tests proved that the combination of 400 nm SiN and 1.6 μm buffer oxide on 250 nm Si is immune to cracking. The top cladding layer (SiO₂) thickness is inconsequential and is simply chosen to be 2.25 μm. We also assume fixed etch depths of 90 nm and 400 nm for the gratings on the Si and SiN layers, respectively, during the optimization. As shown in Fig. 1(a), the top of the cladding and bottom of the BOX layers are also coated with a thin reflective metal to enhance the efficiency of the power transfer between the two layers by containing the field in a vertical Fabry-Perot cavity, on the two sides of the interlayer grating coupler.

With layer thicknesses fixed, the problem of designing the efficient interlayer coupler reduces to finding optimal geometries for the two gratings in the Si and SiN layers. In this optimization, we assumed the bottom (Si) and top (SiN) gratings to have 24 and 18 grooves (periods), respectively. The design parameters are the groove width (identified by “gap” in Fig. 1 (b)) and the material width (identified by “bar” in Fig. 1 (b)) in each period of each grating. This is an unconstrained global optimization problem with the reward function being the coupling efficiency. Considering the high-dimensional search space (assuming the grating geometries are arbitrary), brute-force search approaches are not feasible due to the extremely high computational cost. Metaheuristic approaches such as genetic algorithm (GA) or particle swarm optimization (PSO) are highly effective in dealing with different classes of optimization problems. In our case, we developed a GA code (in Matlab) to perform geometrical optimization. Starting with an educated guess for initial values of the parameters in GA can result in faster convergence. In our case, the initial designs for the gratings is periodic with periods (${\Lambda }_{Si}$and ${\Lambda }_{SiN}$for Si and SiN gratings, respectively) chosen according to the Bragg condition for both gratings [16]:

Considering the dimensions of the films and their corresponding effective refractive indices in the grating regions at free-space wavelength of $\lambda =1550nm$ (i.e., $n_{eff-Si}\approx 2.77$, and $n_{eff-SiN}\approx 1.58$), initial periods of ${\Lambda }_{Si}=600nm$ and ${\Lambda }_{SiN}=1100nm$ for Si and SiN gratings have been chosen, respectively, both with 50% duty cycle. The GA with a population size of 10 (for each generation) was exploited to achieve geometrical optimization for both gratings in initial steps. As the growth rate of the coupling efficiency is reduced (i.e., as we get closer to the optimum solution), we change the geometrical parameters of only one grating in each step and alternate between the two gratings in subsequent steps. This approach divides the overall search space dimension (originally 84-dimensional space) into two separate 48 and 36-dimensional spaces, which in turn helps to reach convergence in a shorter time. The GA process is finalized when the coupling efficiency growth rate becomes negligible (i.e., less than 0.01% per 20 generations).

The reward function is estimated for all individuals in the population by invoking a two-dimensional (2D) electromagnetic solver implemented using the finite element method (FEM) for the structure in Fig. 1(b). We use Wave Optics module in COMSOL software for this purpose. To achieve adequate accuracy, a rather fine mesh size (maximum mesh size is set to 1/20th of the wavelength in each region) is incorporated to discretize the geometry. The input port waveguide on the Si layer is excited with a TE (i.e., electric field parallel to the plane of Si or SiN layer) electromagnetic field featuring a matched spatial profile with that of an unperturbed ridge waveguide.

The outcoming optical power from the top SiN ridge waveguide was then monitored, and the coupling efficiency was calculated simply by dividing the output power at the SiN terminal waveguide to the input power of the Si waveguide (see A and B in Fig. 2(a), respectively). In FEM simulations, we assumed the refractive indices of 3.46, 2.00, and 1.44 for Si, SiN and SiO₂ layers, respectively. Also, the metallic reflectors were modeled by assuming a complex refractive index of 0.55 + 11.5 i associated with gold [18].

 

Fig. 2 Magnitude of the TE field in the optimized structure for (a) the single-mirror and (b) the double-mirror interlayer grating coupler obtained through 2D-FEM simulations at the telecom wavelength (1550 nm). The input terminal of the Si ridge waveguide (Point A) is excited by the TE mode of the waveguide, and the output power is calculated in the SiN waveguide after the grating (Point B). In the figure, brightness indicates relative magnitude.

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The outputs of the GA, i.e., groove sizes (gap) and their relative position with respect to next groove (bar) are compiled in Tables 1 and 2 for structures comprising the double and single (top side) metallic reflectors, respectively. The single reflector structure has only one metallic plate on the top (i.e., the bottom metallic reflector in Fig. 1(a) is not present). The relative displacement of the gratings in two layers (edge of the leftmost grooves, see Fig. 1(b)) is also provided in each case. These results are associated with peak coupling efficiencies of 89% (double-mirror) and 64% (single-mirror) for excitation wavelength of 1550 nm. The corresponding electric field profiles for the single-mirror and double-mirror grating coupler are also shown in Figs. 2(a) and 2(b), respectively. Although realization of structures featuring backside metallic reflectors entails more complexity in terms of fabrication, simulations suggest that the additional bottom reflector can significantly enhance the coupling efficiency, which is worthwhile in applications with tight constraints on the insertion loss.

Table 1. Optimized gap/bar dimensions (in nm) for the double-mirror interlayer grating coupler obtained through GA

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Table 2. Optimized gap/bar dimensions (in nm) for the single-mirror interlayer grating coupler obtained through GA

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To estimate the bandwidth of the interlayer coupler, FEM simulations were performed for the optimized structure for wavelengths ranging from 1510 nm to 1590 nm. Shown in Fig. 3(a) is the frequency response of the two structures. This predicts a 25% wider 3-dB bandwidth of 50 nm for single-mirror grating coupler as compared to the 40 nm bandwidth for the double-mirror grating coupler.

 

Fig. 3 (a) Calculated frequency response of the optimized interlayer grating coupler with single/double metallic mirrors obtained through FEM simulations; (b) Effect of X-direction misalignment of the SiN grating on the insertion loss for the optimized single/double-mirror grating couplers. The geometrical parameter of the two structures are those listed in Tables 1 and 2.

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In practical situations, misalignment between different layers of the coupler is inevitable and depending on the used lithography technology, the misalignment can range from less than 10 nm (e.g., in electron beam lithography) to 1-2 microns in worst cases (e.g., in photolithography). Results shown in Fig. 3(b) predict a similar oscillatory behavior in the insertion loss for both structures as the misalignment varies, and indicate that a maximum penalty of about 3 dB can be imposed on the coupling efficiency for misalignments up to ± 0.5 μm.

We have also investigated the effect of variations in the cladding and buffer thicknesses on the insertion loss at 1550 nm wavelength and the results are shown in Figs. 4(a) and 4(b), respectively. Oscillation seen in Figs. 4(a) and 4(b) are attributed to the vertical Fabry-Perot resonator formed by stacked materials on top of each other with different refractive indices. The change in the total optical length of the vertical cavity can also lead to a shift in the peak transmission wavelength. Figure 4 shows that for operation in the efficient coupling regime, thickness variation of about ± 5% ( ± 0.1 μm) can be tolerated.

 

Fig. 4 Variations of the insertion loss with respect to (a) the cladding layer thickness, and (b) the buffer layer thickness in Fig. 1(b) calculated for 1550 nm wavelength. The parameters of the two structures are the same as those in Tables 1 and 2.

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3. Fabrication and results

The 3D structure in Fig. 1(a) can be fabricated using two different approaches. The first approach is based on bonding (either flip chip or direct bonding) of the appropriate commercially available SOI (from SOITECH) and SiN on oxide (from Rogue Valley) wafers. In this process, lithography and etching are performed on the SOI and SiN substrates separately, and the two substrates are then aligned and bonded together. The second approach is to start with a SOI wafer and fabricate the desired structures in Si. In the next step, we stack the buffer oxide and SiN layers through deposition and define/etch the patterns on the SiN layer after careful alignment with the waveguide in the Si layer. In the last step, the cladding (SiO₂) layer is deposited on top of the SiN device layer. The top and bottom metallic mirrors in both approaches can be readily realized through metallization/liftoff and backside etching/metallization of the device, respectively. In this work, we use the latter approach due to the higher yield, simplicity, and better quality of the final 3D structure without requiring sophisticated processes. We also focus only on demonstration of single-mirror (top mirror) couplers.

In our fabrication process, we start with a commercial SOI wafer (from SOITECH) with a 3 μm BOX layer and a 250 nm thick device Si layer. Since there exist a 160 nm thick pedestal for the grating structure on the Si layer, fabrication of the waveguide, the resonator, and the grating structure on the Si layer require two separate etch steps with different etch depths. The first step includes electron beam lithography (EBL using a JEOL JBX-9300FS system) and inductively coupled plasma (ICP) etching with Cl₂ chemistry with an etch depth of 90 nm to partially form the waveguide and resonator and completely form the 90 nm-deep grating grooves. The electron beam resist in this step is HSQ 6% (Dow Corning). In the second step, we use EBL with ma-N 2400 (Micro Resist Technology) as the resist to cover the grating and perform ICP etching using Cl₂ chemistry for another 160 nm to complete the fabrication of all Si-layer devices. In addition to the desired devices and gratings, we fabricate alignment markers in the Si layer (250 nm etch depth) to facilitate the alignment of the devices in the Si and SiN layers in subsequent steps.

Before depositing the buffer oxide layer, we had to planarize the surface of the chip by spin-coating it with 700 nm flowable oxide (FOX 16% from Dow Corning) and then prebaking at 300 °C on a hotplate for 3 minutes and annealing at 900 °C for 2 hours in a furnace with oxygen ambient. The high temperature annealing step shrinks the film thickness down to 550 nm. Afterward, plasma-enhanced chemical vapor deposition (PECVD) is used to deposit further SiO₂ to reach the buffer thickness 1600 nm measured from the top of the Si waveguide. In the next step, a 400 nm thick SiN layer is deposited in an LPCVD furnace at 800 °C (dichlorosilane to ammonia ratio of 0.35). The gas ratio is chosen to prevent the formation of stress-induced cracks on the SiN film. The grating along with the waveguide/resonator masks on the SiN layer are defined through EBL using a 500 nm thick positive tone electron beam resist (ZEP from ZEONREX Electronic Chemicals) featuring a good etch selectively (~0.5) in CF₄/CHF₃ chemistry. To prevent misalignment due to the charge-up issue during EBL on such insulating layers, we coat the sample with an anti-charging water-soluble solution (ESPACER from Showa Denko). Also, the SiN and SiO₂ layers over the alignment marks are selectively cleared to facilitate the alignment process. The sample is then etched in a reactive ion etching (RIE) chamber (CF₄ = 50 sccm, CHF₃ = 5 sccm) for 400 nm and cladded with a 2.25 micron PECVD SiO₂ layer after it was planarized in a similar way explained earlier. Figure 5(a) shows the optical micrograph of the device after cladding deposition. In the final step, the top mirror is defined though metal evaporation (10 nm Ti, 100 nm Au) on top of a 600 nm patterned PMMA (from MICROCHEM) and the subsequent liftoff process.

 

Fig. 5 (a) Optical micrograph of the fabricated devices before metallization step including: (top) SiN reference waveguide, (middle) Si reference waveguides coupled to a microdisk, and (bottom) connected Si/SiN waveguides through an interlayer grating coupler. (b) Optical micrograph of the interlayer grating coupler with a top metallic mirror (10 nm Ti adhesion layer along with 100 nm gold)

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In our design, 12 μm wide gratings on Si and SiN layers are laterally connected to 500 nm and 1.3 μm wide waveguides, respectively, through 100 μm long linear tapers (see Fig. 5). A similar back-to-back linear taper is included in the middle of reference waveguides on both Si and SiN layers. The dimensions of both waveguides are chosen to ensure single TE-mode operation. The waveguide on the SiN layer is point-coupled (500 nm gap) to a 2 μm wide microring with outer radius of 35 μm (device shown at the bottom in Fig. 5(a)). Also a 7 μm radius microdisk with both TE and TM modes was placed 180 nm away from the Si reference waveguide (device shown in the middle in Fig. 5(a)). The transmission characteristics of this structure is used to adjust the input polarization to make sure the on-chip polarization is the desired one. Waveguides on both layers are extended at both sides for a few millimeters without tapering. Access to waveguide facets is made possible by cleaving the sample at both sides perpendicular to the waveguides.

To characterize the device, the output light of a tunable laser (Agilent 81682A) is launched into a lensed single mode fiber through an in-line polarization controller. The fiber is mounted on a stage equipped with XYZ micro-positioners as well as a rotation/tilt compensator. The fiber is then aligned so that its outcoming light is focused on the input facet of the integrated waveguide in the desired (Si and SiN) layer. The output light from the chip is collected at the output facet with a similar lensed fiber and fed directly into a detector (Thorlabs PDB150C 800−1700 nm). The transmission spectrum of the device along with reference waveguides were then obtained by sweeping the laser wavelength from 1460 nm to 1530 nm. To adjust the state of polarization of the incoming laser light, fibers are first aligned with the Si reference waveguide facet; and the in-line polarization controller is adjusted so that the TM resonance modes of the microdisk in the Si layer are suppressed in the output (i.e., TM modes are not excited through the coupled Si waveguide). Once the TE polarization is set, the transmission spectrum of the desired devices on the chip are characterized by measuring the optical power in the output fiber for each device. To minimize the effect of fiber to waveguide coupling variation (caused by possible misalignment), we repeat the alignment several times to make sure maximum coupling is achieved at a fixed wavelength (i.e., 1470 nm). With the described measurement setup, the total fiber-to-fiber insertion loss comprises coupling losses of fibers and waveguide facets (at both input and output of the chip), waveguide scattering loss, reflection/scattering loss of the tapered regions, and interlayer grating couplers. Assuming similar fiber/facet alignment for all waveguides and the same propagation losses in the waveguides, the coupling efficiency at the grating coupler can be estimated by comparing its corresponding fiber-to-fiber insertion loss with that of the reference waveguide structures on the Si and SiN layers.

Figure 6 shows the normalized TE transmission spectrum of the interlayer grating coupler. The observed shift (relative to the design value) on the peak transmission wavelength of the interlayer grating coupler response is believed to be due to both thickness variations of the deposited layers and the scaled dimensions of the grating grooves. While the former effect was observed during fabrication, the latter is probably due to non-optimized EBL dosage in defining the grating grooves in Si and SiN layers. Figure 6 clearly shows the wideband transmission spectrum of the interlayer grating coupler (3-dB bandwidth of at least 40 nm with peak transmission wavelength of around 1470 nm). The sharp resonance signatures in the transmission spectrum (Fig. 6) are related to the coupled ring resonator on the SiN layer. The Lorentzian lineshape of the resonance around 1467.5 nm (inset of Fig. 6) shows a loaded Q factor of around 150k.

 

Fig. 6 Normalized transmission spectrum of the interlayer grating coupler embedded at the intersection of the Si/SiN waveguides. Sharp resonances (loaded Q of 150K) are related to the coupled microring cavity on the SiN layer. The green curve is the averaged transmitted power.

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To estimate the coupling efficiency of the interlayer gating couplers at 1470 nm wavelength, we use the measured transmission of the Si reference waveguide, the SiN reference waveguide and the Si/SiN structure with the grating coupler, which are −27.78 dB, −14.77 dB, and −23.10 dB, respectively. The difference (~13 dB) in the detected signal levels for the Si and SiN reference waveguides is attributed to the different facet dimensions (500 nm × 250 nm for Si and 1.3 μm × 400 nm for SiN) as well as the higher refractive index mismatch for the Si waveguide, which is in agreement with the modal overlap calculations. Assuming the grating to be in the middle of the Si/SiN structure, the respective transmission from the Si and SiN waveguide section in the structure can be estimated at −27.78 /2 = −13.89 dB and −14.77/2 = −7.38 dB, respectively. Thus, the overall transmission of the waveguide section of this structure is −13.89 + (−7.38) = −21.27 dB. Comparing with the overall −23.10 dB transmission, we attribute −2.03 dB to the transmission of the single-mirror interlayer grating coupler. This corresponds to the coupling efficiency of ~63%, which agrees well with the theoretical calculations (64%). By using the bottom layer mirror, we except to increase the efficiency to 89%. This is to the best of our knowledge the highest coupling efficiency over a large bandwidth (> 40 nm) in a Si/SiN hybrid structure reported to date. We believe that the coupling structure reported here can facilitate the realization of functional devices in hybrid CMOS-compatible material platforms.

4. Conclusion

We theoretically demonstrated, two high-efficiency and wideband interlayer grating couplers for the SiN/SiO₂/Si material platform, based on coupled gratings with single- and double-metallic mirrors on the top and bottom of the structure. The structure with single (top) reflector was experimentally demonstrated with an insertion loss of ~2 dB and a 3-dB bandwidth of > 40 nm. FEM simulations suggest that adding another reflector to the bottom of the structure can further enhance the efficiency up to 89% while keeping the bandwidth around 40 nm. This work demonstrates the possibility of low-loss 3D integration of optical devices on hybrid material platforms.