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An optical scattering layer, consisting of a Si3N4 nano-pillar array and a spin-coated hydrogen silsesquioxane (HSQ) planarization layer, was introduced to an organic light-emitting diode (OLED) substrate to increase the out-coupling efficiency. After plasma enhanced chemical vapor deposition (PECVD) of the Si3N4 layer, the nano-pillar array was created using nanoimprint lithography and reactive ion etching. As the Si3N4 pillar array has a refractive index of 2.0, photons generated in the organic layer are scattered by the Si3N4 structures and thus have a higher chance of being emitted from the device. The spin-coated HSQ planarization layer produces a flat substrate, which is essential for depositing a uniform organic material layer and assuring the electric conductivity of the transparent conducting oxide (TCO) layer. In this study, Si3N4 nano-structures with a height of 100 or 300 nm were used to enhance the out-coupling efficiency of the OLED devices. Although the electrical conductivity of the TCO layer deposited on the light scattering layer was slightly degraded, the OLED devices formed with the light scattering layer exhibited a higher luminous power at given electrical power. Consequently, the use of a planarized 300-nm-thick Si3N4 layer increased the external quantum efficiency of the OLED device by 50% at 10,000 cd/m2 compared to the reference OLED device fabricated on a flat glass substrate.
© 2014 Optical Society of America
1. Introduction
Organic light-emitting diode (OLED) have a high luminous efficiency, potentially low fabrication cost, thin and simple structure, relative low power consumption, and adaptability to flexible polymer substrates, which makes them ideal for various applications including mobile devices, lighting devices, and large-size displays. However, the low out-coupling efficiency needs to be improved before OLED can be used in such applications. It is well known that the out-coupling efficiency of a conventional OLED is limited to 30% because some of the light generated in the active layer is confined to the device by the interface between the glass substrate and transparent conducting oxide (TCO) or the TCO and organic layers, which have different refractive indices [1–7].
To resolve the low out-coupling efficiency caused by confined light or total internal reflection (TIR), there have been many attempts to improve the light extraction efficiency by introducing a random texturing layer on the glass substrate [8,9], micro-lens arrays [10], or photonic crystals (PCs) [11–15], or by fabricating a mesh pattern between the glass substrate and indium-tin-oxide (ITO) transparent electrode [16]. Several other approaches such as controlling the molecular orientation of the emission layer, increasing the distance between the emitting layer and metal electrode, and fabricating a non-metal electrode [17–20] have also been proposed. In our study, we attempted to improve the out-coupling efficiency using a structural approach: ultraviolet nanoimprint lithography (UV-NIL) was used to pattern nanoscale Si3N4 structures onto the glass substrate so that light generated in the active layer is scattered by the nanoscale structures. However, introducing such Si3N4 structures can degrade the current leakage of device and sheet resistance of the TCO layer because of the rougher surface and presence of sharp edges [21]. To minimize the degradation, the Si3N4 patterned substrates were planarized by hydrogen silsesquioxane (HSQ) [22]. Here, we report on this simple, low cost, rapid process for fabricating a light scattering layer consisting of Si3N4 patterned structures and spin-coated HSQ.
2. Experimental details
The Si3N4 layer, 100 or 300 nm in thickness, was deposited on the glass substrate (Corning Eagle XG) using plasma-enhanced chemical vapor deposition (PECVD). The details of the process flow are shown in Fig. 1. Following this, a 200-nm-thick lift off layer (LOL 2000) was spin coated for 30 s at 2000 rpm and baked at 170 °C for 7 min. The LOL spin-coating step was performed twice to deposit a 400-nm-thick layer. The resist pattern using methacryloxypropyl terminated polydimethylsiloxane (m-PDMS) was formed on the LOL layer using UV-NIL; details of the UV-NIL process can be found elsewhere [23]. The LOL layer was then selectively removed by O2-plasma-based reactive ion etching (RIE), and a 150-nm-thick Cr layer was then deposited using an e-beam evaporator.
Fig. 1 (a)–(i) Schematic of the fabrication of the Si3N4 patterned glass using UV nanoimprint lithography
After the lift-off process, the Cr patterns were used as a mask to etch the Si3N4 layer because of the strong adhesion and high endurance of Cr to the etching chemicals. Most of the light generated in the organic emission layer is trapped by TIR due to the difference in the refractive indices of the glass and ITO electrode. By inserting an optical scattering layer consisting of a Si3N4 nano-pillar array and a spin-coated HSQ planarization layer, TIR can be suppressed by inducing multiple light scattering, thereby improving the out-coupling efficiency of the OLED devices [24,25].
3. Results and discussion
As shown in Fig. 2, Si3N4 pillar array structures with heights of 100 or 300 nm were formed on the glass substrate by the PECVD growth of Si3N4, UV-NIL, and RIE of Si3N4. The diameter and pitch of the Si3N4 patterns were fixed to 300 and 600 nm, respectively. Since any surface roughness will result in electrical degradation of the TCO and organic active layers, the glass substrate with the Si3N4 pillar array structures was planarized by a spin-coated HSQ layer prior to the deposition of TCO. HSQ is a typical spin-on-glass (SOG) material. Figures 2(c) and 2(d) show that the surface was planarized uniformly without cracking.
Fig. 2 Cross sectional SEM micrographs (a) 100 nm Si3N4 pattern, (b) 300 nm Si3N4 pattern, (c) 100 nm Si3N4 pattern planarized with HSQ layer, (d) 300 nm Si3N4 pattern planarized with HSQ layer.
The root mean square (RMS) roughness values of the 100- and 300-nm Si3N4 patterned glass surfaces decreased to 8.3 and 10.3 nm, respectively, after HSQ spin coating as shown in Fig. 3.
Fig. 3 AFM images of (a) 100 nm Si3N4 pattern, (b) 300 nm Si3N4 pattern, (c) 100 nm Si3N4 pattern planarized with HSQ layer, (d) 300 nm Si3N4 pattern planarized with HSQ layer.
The HSQ was spin coated onto the 100-nm Si3N4 patterned glass for 30 s at 2000 rpm; the spin coating of the HSQ layer onto the 300-nm Si3N4 patterned glass was performed in two steps. The total transmittance and diffuse transmittance of the bare glass, 100- and 300-nm Si3N4-pillar patterned glass, and planarized Si3N4-pillar patterned glass substrates were measured for normal incident light in the visible region. According to Fig. 4(a), the total transmittance of the patterned substrates was slightly lower than that of the bare glass.
Fig. 4 Transmittance measurements of the bare glass, 100 nm and 300 nm Si3N4 pillar patterned glass and planarized Si3N4 pillar patterned glasses.
The transmittance value decreased as the height of the Si3N4 pillar structures increased. The diffuse transmittance (Fig. 4(b)) was close to zero for the bare glass substrate, which was expected because the diffuse transmittance results from the scattering of the incident light by the Si3N4 pillar structure. The Si3N4-pillar patterned glass substrates have a diffuse transmittance of up to 35%, with the 300-nm Si3N4-pillar patterned glass substrate having a higher value than that of the 100-nm Si3N4-pillar patterned glass substrate. Planarization of the Si3N4 patterns by the HSQ layer did not decrease the diffuse transmittance value because of the difference in the refractive indices of the Si3N4 and HSQ (SiO2). At a wavelength of 500 nm, which is the emission wavelength of the OLED device, the diffuse transmittance of the glass substrate patterned with the 300-nm Si3N4 pillars and planarized by HSQ was about 25%, which implies that light scattering by the Si3N4 pillars enhances the light extraction efficiency of the OLED device. The effect of planarization was analyzed by measuring the sheet resistance of the ITO layer. The sheet resistance of the ITO on the bare glass substrate was 25.3 Ω/□, but this value increased to 49.1 and 61.0 Ω/□ for substrates of the 100- and 300-nm Si3N4-pillar patterned glass, respectively. After planarization, the corresponding sheet resistances decreased to 31.4 and 37.0 Ω/□, respectively.
The OLED devices fabricated with the planarized 100- and 300-nm patterned glass substrates exhibit current-density–voltage (J–V) characteristics and electroluminescence (EL) spectra, as shown in Figs. 5(a) and 5(b). According to Fig. 5(a), the turn-on voltages of all the OLED devices are 6.0 V, indicating that the quality of the OLED devices on the different substrates is the same. However, a higher current density was observed for the OLED device on the bare glass substrate at high driving voltage range due to the lower sheet resistance of the ITO layer. The EL spectra of the OLED devices at 14 V (Fig. 5(b)) show that devices on the patterned and planarized patterned glass substrates have a weaker EL intensity because of the higher sheet resistance of the ITO layer compared to the case of bare glass.
Fig. 5 (a) Current density-voltage (J-V) characteristics and (b) Electroluminescence spectra of OLED devices, fabricated on bare glass and glass substrates, patterned with 100 nm and 300 nm Si3N4 and planarized by HSQ layer, respectively.
Despite the weaker EL intensity that was observed for the OLEDs on the patterned and planarized glass substrates, the light out-coupling efficiency of these OLEDs improved as a result of light scattering by the Si3N4 structures. According to Fig. 6(a), the current efficiency of the OLED device fabricated on the planarized 300-nm patterned glass was higher than that of the OLED on the bare glass substrate. A higher current efficiency indicates that at a given luminance, more light is emitted from the device at the same current, and an increase in the current efficiency corresponds to an increase in the out-coupling efficiency. To obtain the same current, a higher voltage needs to be applied to the OLED devices on the patterned and planarized patterned glass substrates. The External quantum efficiency (EQE) of the OLED devices as a function of luminance is shown in Fig. 6(b). The OLED on the planarized 300-nm patterned glass substrate has a higher EQE because of the enhancement in the out-coupling efficiency resulting from light scattering. The OLED on the planarized 100-nm patterned glass substrate has almost identical EQE because the light scattered by the Si3N4 structures was not strong enough to compensate the degradation in the sheet resistance of the ITO layer.
Fig. 6 (a) Current efficiency versus luminance and (b) Quantum efficiency Luminance for OLED devices, fabricated on bare glass and glass substrates, patterned with 100 nm and 300 nm Si3N4 and planarized by HSQ layer, respectively.
4. Conclusions
OLED devices were fabricated on glass substrates patterned with 100- and 300-nm Si3N4 pillars and planarized with a HSQ layer. The Si3N4 pillars were formed to scatter the light generated in the organic active layer so as to overcome the TIR, and the HSQ layer was introduced to obtain the flat surface necessary for fabricating the OLED device. ITO layers deposited on the patterned and planarized patterned glass substrates exhibited an increased sheet resistance, which was detrimental to the performance of the OLEDs. However, there was an improvement in the out-coupling efficiency of the devices because of the light scattered by the Si3N4 structures. Furthermore, while the quantum efficiency of the OLED on the planarized 100-nm Si3N4 patterned glass substrate showed almost identical to that of the OLED on the bare glass substrate, the OLED on the planarized 300-nm Si3N4 patterned glass substrate exhibited a 50% increase in the quantum efficiency at 10,000 cd/m2.
Acknowledgments
This research was supported by the Pioneer Research Center Program through the National Research Foundation of Korea funded by the Ministry of Science, ICT & Future Planning (NRF-2013M3C1A3063597). This research was also supported by the R&D program for Industrial Core Technology through the Korea Evaluation Institute of Industrial Technology supported by the Ministry of Knowledge Economy in Korea (Grant No. 10040225).
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