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Silica-based PLC with heterogeneously-integrated PDs for one-chip DP-QPSK receiver

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Abstract

To realize a DP-QPSK receiver PLC, we heterogeneously integrated eight high-speed PDs on a silica-based PLC platform with a PBS, 90-degree optical hybrids and a VOA. The use of a 2.5%-Δ waveguide reduced the receiver PLC size to 11 mm x 11 mm. We successfully demonstrated 32 Gbaud DP-QPSK signal demodulation with the receiver PLC.

©2012 Optical Society of America

1. Introduction

With advanced formats such as dual polarization quadrature phase shift keying (DP-QPSK) and quadrature amplitude modulation (QAM) there is a strong need for an integrated coherent receiver. This is because the receiver is composed of plural optical passive circuits that control polarization and phase, such as a polarization beam splitter (PBS) and a 90-degree optical hybrid (OH), and a high-speed photodiode (PD) array to detect the signal [1,2]. Monolithic and hybrid integration approaches have been investigated to meet the demand for compact integrated receivers. InP- and Si-based photonic integrated circuits (PICs) based on a monolithic integration technique have already been reported [3,4]. To improve the receiver performance, hybrid integrated receivers with optimized individual components derived from suitable materials have also been reported [5,6]. Silica-based planar lightwave circuits (PLCs) constitute one of the most appropriate devices for hybrid integration because they offer various optical passive functions with excellent characteristics including phase and polarization controllability and athermal performance [7,8]. However, since the hybrid integration approach requires optical elements such as mirrors and lenses, the size of the devices tends to be larger than Si- or InP-based PICs. They also require a complicated assembly process with accurate optical alignment.

We recently demonstrated the heterogeneous integration of a silica-based planar lightwave circuit (PLC) and a high-speed InP PD [9]. Unlike the hybrid integration approach, these PDs were monolithically fabricated on a PLC using a photolithographic process. We also integrated micro mirrors were on the PLC to provide optical coupling between the waveguides and the PDs. Thus low-loss optical coupling is easily realized without the need for any complicated optical alignment or micro lenses. However, in the previous study we demonstrated the integration of only four PDs with a single OH.

Here, we demonstrate the integration of a PBS, two OHs, a VOA, eight PDs and a monitor PD in 1-chip for DP-QPSK demodulation. The nine PDs and the micro mirrors were fabricated by using a heterogeneous integration technique. To achieve a small integrated PLC, we employed a PLC based on 2.5%-Δ waveguides with a minimum bending radius of 1 mm. This PLC chip is 11 mm x 11 mm, which is half the size of a conventional PLC-type PBS-integrated OH [5]. We employed the VOA to expand the input power dynamic range of the receiver PLC. We demonstrated 32 Gbaud DP-QPSK signal demodulation at various input optical powers and the attenuation level of the integrated VOA.

2. Design and fabrication

The schematic configuration of a heterogeneous integrated DP-QPSK receiver PLC is shown in Fig. 1 . The receiver PLC is composed of the following optical building blocks. The VOA driven by the thermo optic effect is composed of a Mach-Zehnder interferometer (MZI) and thin film heaters. The PBS is also composed of an MZI and two polyimide quarter waveplates. The waveplates were tilted at 0 and 90 degrees, respectively, and inserted in the two arms of the MZI [8]. This configuration is highly symmetric and thus can suppress the temperature dependence of the polarization extinction ratio (PER). The signal and local lights were mixed at the 90-degree OHs that consist of one 1 x 2 Y-branch and three 2 x 2 couplers. We used a 2 x 2 multimode interference (MMI) coupler designed for a 90-degree phase shifter instead of a delay line, because an MMI is more tolerant to fabrication errors such as refractive index and waveguide errors [8]. The interference signals from the OHs are reflected into the PDs by the micro mirror fabricated at the chip edge. The attenuation of the VOA is controlled by monitoring the input power with the monitor PD, which was fabricated at the same time as the other eight PDs. The optical tap ratio to the monitor port is 10%.

 figure: Fig. 1

Fig. 1 Schematic configuration of DP-QPSK receiver PLC.

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We used the heterogeneous integration technique to fabricate the receiver PLC as follows [9]. Figure 2 shows the fabrication procedure, which focuses on the integration area of the InP PD and a micro mirror. First, an embedded silica-based waveguide is formed by silica-glass deposition, photolithography and dry etching. An InP chip with epitaxial layers on a substrate is also prepared for PD fabrication. Then, the InP chip is bonded to the PLC surface once a polyimide bonding layer has been formed on the over-cladding by spin coating. Next, the substrate of the InP chip is removed by using mechanical polishing and chemical etching techniques. After that, the pin-PD and electrical wires are fabricated by a conventional PD fabrication technique. Finally, the micro mirror is fabricated by dry tilt etching, and aluminum is deposited on the mirror surface to achieve a high reflection.

 figure: Fig. 2

Fig. 2 Procedure for fabricating a receiver PLC with a heterogeneous integration technique (integration of a PD and a micro mirror).

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Although the distance between the PD and the mirror is shortest when the mirror angle is 45 degrees, we increased the mirror angle from 45 to 58 degrees. This is to avoid the reflection of direct light from the PD detection surface to the waveguide. The diameter of the reflected beam expands to about 10 μm in the PD detection region, whose diameter is 19 μm. Therefore, highly efficient and compact optical coupling can be obtained without any optical lenses.

Figure 3(a) shows an integrated receiver chip based on a PLC. Using PLC technology based on 2.5%-Δ waveguides, a PBS, two OHs, and a VOA are integrated into a compact 11 mm x 11 mm chip. In addition, eight PDs and a monitor PD are also fabricated on the PLC without any increase in the chip size owing to the heterogeneous integration. Figure 3(b) shows a SEM image of the PD integration area. The PDs located at the chip edge are uniformly fabricated using a photolithographic process. The PD pitch is set at 300 μm corresponding to the electrode pitch of a transimpedance amplifier (TIA). The PD chip edge location enables us to connect PDs and TIAs within a short distance, which is necessary for high-speed signal transmission.

 figure: Fig. 3

Fig. 3 (a) Integrated receiver PLC(w/o waveplate), (b) SEM image of PD integration area at X-port.

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3. Characteristics

We first measured the characteristics of the PLC and the InP PDs separately. Figure 4(a) shows the PER of the PBS. We successfully confirmed a PER of >20 dB over the C-band for the TE and TM ports. Figure 4(b) shows the phase differences between the I and Q channels of the positive and negative outputs. To measure the phase error, we attached an extra delay line circuit and a Y-branch splitter in front of the input ports, and estimated the phase error from the transmission spectra. The estimated phase deviations from 90 degrees were less than 3 degrees without any phase tuning. Figure 4(c) shows the VOA attenuation characteristics and the polarization dependent loss (PDL). These results were obtained with a test sample to estimate the characteristics of the VOA integrated in the receiver PLC. 10 dB attenuation was obtained at 420 mW, while the PDL was less than 2 dB. Next, we evaluated the I-V characteristics of the InP PDs integrated on the PLC. Figure 4(d) shows the dark currents of eight high-speed PDs. We obtained a dark current as low as 6 nA at a reverse bias voltage of 3.5 V for each PD.

 figure: Fig. 4

Fig. 4 Characteristics of functional building blocks in receiver PLC, (a) wavelength dependence of PER of the PBS, (b) phase difference of 90-degree optical hybrids, (c) characteristics of VOA, (d) dark currents of eight high-speed PDs.

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Next, we evaluated the OE characteristics of the receiver chip. Figure 5(a) shows the responsivities of PDs integrated on a PLC at a wavelength of 1.55 μm. The measured fiber-to-PD responsivities were around 0.015 A/W for the signal input. The responsivities were relatively small compared with the PD responsivity of 0.9 A/W because of the large insertion loss of 17.8 dB. This comprises a splitting loss of 6 dB, a fiber-to-PLC coupling loss of 0.5 dB, a PLC-to-PD coupling loss of 0.9 dB and an excess loss of 10.4 dB. This excess loss is larger than the designed value of 6 dB mainly due to the imperfect design parameters of the 2.5%-Δ PLC, so there is the potential for improvement. A PER of about 20 dB was confirmed for both polarizations, which indicates good PBS performance. We also measured the frequency response of the PDs integrated on the PLC at a bias voltage of 3.5 V. Figure 5(b) shows the normalized OE responses versus frequency of eight high-speed PDs. We obtained a high-speed OE response with a 3 dB bandwidth of over 25 GHz resulting from the MIC-PD design [10].

 figure: Fig. 5

Fig. 5 (a) Responsivity of integrated PDs in a receiver PLC (bias voltage: 1 V), (b) normalized OE responses of eight high-speed PDs integrated on the PLC.

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4. Demonstration of 32 Gbaud DP-QPSK demodulation

We demonstrated 32 Gbaud DP-QPSK signal demodulation with our fabricated receiver PLC and the measurement setup shown in Fig. 6(a) . Two tunable laser arrays (TLAs) were used as a signal and a local oscillator. The signal was modulated with a pseudorandom binary sequence (PRBS) of 215-1. The signal power was set at −3 dBm and the local oscillator power was set at + 16 dBm. A clear constellation was successfully obtained by off-line digital signal processing, as shown in Fig. 6(b). Then, a Q value of around 9.1 dB was confirmed at an OSNR of 16 dB. These results indicate that eight PDs with uniform characteristics and optical passives with excellent polarization and phase controllability were integrated in the receiver PLC.

 figure: Fig. 6

Fig. 6 (a) Schematic of measurement setup, (b) measured constellation (OSNR: 35 dB).

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Moreover, to evaluate the advantage of VOA integration, we demonstrated signal demodulation under VOA operation. Figure 7(a) shows the signal input power dependence of the Q value. The input power was changed from −4 to + 12 dBm. Without a VOA, the Q value increases as the input power increases from −4 dBm to + 4 dBm, but decreases at an input power of more than + 6 dBm. Under VOA operation, however, the Q value does not decrease with an input power of more than + 6 dBm. Figure 7(b) shows the OSNR dependence of the Q value. As the input power increased from −3 to + 7 dBm, we adjusted the attenuation level from 0 to 10 dB. The effective signal input power thus maintained a constant value of −3 dBm. The change in the Q value was small regardless of the VOA attenuation level and the thermal effect of the heater. These results prove that VOA integration on a small-sized PLC has the potential to improve the input power dynamic range of an integrated receiver for future photonic networks.

 figure: Fig. 7

Fig. 7 (a) Input power dependence of Q value (b) OSNR dependence of Q value.

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4. Conclusion

We demonstrated a 1-chip DP-QPSK receiver PLC integrated with a PBS, two OHs, a VOA, eight PDs and a monitor PD on a silica-based PLC platform. Using heterogeneous integration technology, we integrated high-speed InP PDs without a lens, and obtained uniform responsivities. We successfully demonstrated 32 Gbaud DP-QPSK signal demodulation thanks to a polarization extinction ratio of over 20 dB at the PBS and phase deviations of less than 3 degrees from 90 degrees at the OHs.

Acknowledgments

We thank all the members of NTT Photonics Laboratories, especially S. Kodama, H. Nosaka, K. Sano, H. Fukuyama, T. Saida, and M. Itoh for their collaboration.

References and links

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3. R. Kunkel, H.-G. Bach, D. Hoffmann, C.M. Weinert, I. Molina-Fernandez, and R. Halir, “First monolithic InP-based 90°-hybrid OEIC comprising balanced detectors for 100GE coherent frontends,” in IPRM 2009, TuB2.2.

4. C. R. Doerr, P. J. Winzer, S. Chandrasekhar, M. Rasras, M. Earnshaw, J. Weiner, D. M. Gill, and Y. K. Chen, “Monolithic silicon coherent receiver,” in OFC/NFOEC 2009, PDPB2.

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6. J. Wang, M. Kroh, A. Theurer, C. Zawadzki, D. Schmidt, R. Ludwig, M. Lauermann, Z. Zhang, A. Beling, A. Matiss, C. Schubert, A. Steffan, N. Keil, and N. Grote, “Dual-quadrature coherent receiver for 100G Ethernet applications based on polymer planar lightwave circuit,” Opt. Express 19(26), B166–B172 (2011). [CrossRef]   [PubMed]  

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10. T. Yoshimatsu, Y. Muramoto, S. Kodama, T. Furuta, N. Shigekawa, H. Yokoyama, and T. Ishibashi, “Suppression of space charge effect in MIC-PD using composite field structure,” Electron. Lett. 46(13), 941–943 (2010). [CrossRef]  

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Figures (7)

Fig. 1
Fig. 1 Schematic configuration of DP-QPSK receiver PLC.
Fig. 2
Fig. 2 Procedure for fabricating a receiver PLC with a heterogeneous integration technique (integration of a PD and a micro mirror).
Fig. 3
Fig. 3 (a) Integrated receiver PLC(w/o waveplate), (b) SEM image of PD integration area at X-port.
Fig. 4
Fig. 4 Characteristics of functional building blocks in receiver PLC, (a) wavelength dependence of PER of the PBS, (b) phase difference of 90-degree optical hybrids, (c) characteristics of VOA, (d) dark currents of eight high-speed PDs.
Fig. 5
Fig. 5 (a) Responsivity of integrated PDs in a receiver PLC (bias voltage: 1 V), (b) normalized OE responses of eight high-speed PDs integrated on the PLC.
Fig. 6
Fig. 6 (a) Schematic of measurement setup, (b) measured constellation (OSNR: 35 dB).
Fig. 7
Fig. 7 (a) Input power dependence of Q value (b) OSNR dependence of Q value.
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