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In this paper, we present a modified coded hybrid subcarrier/ amplitude/phase/polarization (H-SAPP) modulation scheme as a technique capable of achieving beyond 400 Gb/s single-channel transmission over optical channels. The modified H-SAPP scheme profits from the available resources in addition to geometry to increase the bandwidth efficiency of the transmission system, and so increases the aggregate rate of the system. In this report we present the modified H-SAPP scheme and focus on an example that allows 11 bits/Symbol that can achieve 440 Gb/s transmission using components of 50 Giga Symbol/s (GS/s).
©2010 Optical Society of America
1. Introduction
Achieving optical transmission beyond 100 Gb/s per wavelength has become the interest of many research groups in the last several years. Different techniques such as polarization multiplexed QPSK with phase and polarization tracking; and blind equalization [1]; iterative bandwidth-efficient coded modulation scheme based on bit-interleaving low-density parity-check (LDPC) codes, and M-ary differential phase-shift keying using direct detection [2], [3]; and multidimensional LDPC-coded modulation scheme [4] are some examples. This interest is a result of the continuously increasing demand on transmission capacities, due to the increasing popularity of the internet and higher quality multimedia. According to some industry experts, 1 Tb/s should be standardized by the year 2012–2013 [5].
In this paper, we propose a scheme that achieves beyond 400 Gb/s per wavelength transmission by upgrading currently available communication systems operating at lower speeds such as 50 GSymbols/s (GS/s). The proposed scheme is a modified hybrid subcarrier/amplitude/phase/polarization (H-SAPP) LDPC-coded modulation [6], which aggregate data rate is insufficient for next generation 400 Gb/s optical transmission. Modified H-SAPP is composed of three or more HAPP subsystems modulated with different subcarriers that are multiplexed together. Under the condition that orthogonality between the subcarriers is preserved, at any symbol rate and code rate, H-SAPP is capable of achieving the aggregate rate of the individual HAPP systems it is composed of, without introducing any bit-error ratio (BER) performance degradation. The modified H-SAPP is capable of increasing the aggregate transmission rate in comparison to H-SAPP in [6], as mapping of the signal constellation points is done onto the vertices of both a polyhedron and its dual, increasing the total possible number of constellation points. More details on modified H-SAPP can be found in Section 2. In this paper, coding is done using structured quasi-cyclic low-density parity-check (LDPC) codes [7]. Structured LDPC codes allow easier iterative exchange of the extrinsic soft bit reliabilities between the equalizer and the LDPC decoder, and reduce the encoding complexity in comparison to the random codes.
The proposed technique is demonstrated by 32-H-SAPP and is compared with different H-SAPP, HAPP and QAM schemes.
2. Modified H-SAPP LDPC-coded modulation
H-SAPP is composed of two or more HAPP subsystems modulated with different subcarriers to exploit the full potential of the 3-dimentional space. H-SAPP is capable of increasing the Euclidian distance between the constellation points in comparison to 2-dimensional quadrature amplitude modulation (QAM) counterparts which leads to improving the BER performance of the overall system. In comparison with HAPP system, H-SAPP allows a non-power-of-two constellation to be utilized such as 20-point H-SAPP. This is achieved by including different subcarriers as shown later in the examples. The HAPP modulation format is based on regular polyhedrons inscribed inside a Poincaré sphere. As regular polyhedrons are not flexible in terms of number of vertices, the number of points per constellation becomes limited. For that matter, H-SAPP offers a more flexible utilization of the nice properties of these polyhedrons as it allows the combination of different polyhedrons as will be shown in a simple example explained later through the text.
The modified H-SAPP increases the potential of the H-SAPP in a three-dimensional space by including both the regular polyhedron and its dual in a single system. The dual of a polyhedron is defined as the polyhedron that corresponds to the faces of the other.
In an H-SAPP or a modified H-SAPP system, N input bit streams from different information sources are divided into L groups. The selection process for the different groups N 1,N 2,…,NL is governed by two factors, the required aggregate rate, and the polyhedron of choice. Each Nl, the number of streams in the lth group, is then used as input to a HAPP transmitter, where it is modulated with a unique subcarrier. The outputs of the L HAPP transmitters are then forwarded to a power combiner in order to be sent over the fiber. At the receiver side, the signal is split into L branches and forwarded to the L HAPP receivers. Figure 1(a) shows, without loss of generality, the block diagram of the 32-H-SAPP system configuration where N = 11 and L = 4. N 1, N 2, N 3 and N 4 are 4, 2, 2 and 3 respectively. N 1 and N 2 represent a dodecahedron of 20 vertices and 12 faces, and N 3 and N 4 represent the dual icosahedron of 12 vertices.
Fig. 1 H-SAPP bit-interleaved LDPC-coded modulation block diagrams: (a) 32-H-SAPP system, (b) HAPP transmitter (c) HAPP modulator and (d) HAPP receiver configurations.
Figure 1(b) shows the block diagram of the coded HAPP transmitter. Nl input bit streams from l different information sources, pass through identical encoders that use structured LDPC codes with code rate k/n. (k represents the number of information bits, and n represents the codeword length). The outputs of the encoders are interleaved by an Nl × n interleaver that writes the sequences row-wise and read them column-wise. The output of the interleaver is sent Nl bits at a time instant i, to a mapper that maps each Nl bits into a 2Nl-ary signal constellation point on a vertex of a polyhedron inscribed in a Poincaré sphere. Mapping is done using a lookup table (LUT). The ensemble of all the vertices of the HAPP systems forms the vertices of the regular polyhedron and its dual in a modified H-SAPP. The signal is then modulated by the HAPP modulator.
Figure 1(c) shows the HAPP modulator. The HAPP modulator is composed of two amplitude modulators (AM) and one phase modulator (PM). The three voltages (φ 1, i,φ 2, i,φ 3, i) needed to control these modulator are defined in an LUT based on Eqs. (2) below. As aforementioned, the designed polyhedrons are inscribed in a Poincaré sphere, hence Stokes parameters give the most flexible representation to define the coordinates of the vertices. Stokes parameters shown in (1) from [8], are then converted into amplitude and phase parameters according to Eq. (2).
whereWithout loss of generality, we can assume that = 0 at all times, hence . The system that yields from (1) and (2) is an easy to solve system of three equations with three unknowns. Using symmetrical geometric shapes results in closed form numbers for the voltages as shown in Table 1 . Table 1 is the LUT for 8-HAPP of [6].
Table 1. Mapping rule lookup table for 8-HAPP.
The HAPP receiver is shown in Fig. 1(d). At the receiver side, the signal from fiber is passed through a polarization beam splitter (PBS) into two coherent detectors. The four outputs of the detectors provide all the information needed for the amplitudes and phases for both polarizations. The outputs are then demodulated by the subcarrier specified for the corresponding HAPP receiver before being sampled at the symbol rate. After sampling, the sampled data is forwarded to the a posteriori probability (APP) demapper. The output of the demapper is then forwarded to the bit log-likelihood ratios (LLRs) calculator which provides the LLRs required for the LDPC decoding process as in [9]. The extrinsic information is then iterated back and forth between the LDPC decoder and the APP demapper until convergence is achieved unless the predefined maximum number of iterations is reached. We denote this process by outer iterations, in contrast with the inner iterations within the LDPC decoder itself.
We now move to the detailed example of the 32-H-SAPP. We define in Table 2 , the LUT for the 32-H-SAPP with a constellation of a dodecahedron and its dual. This configuration utilizes four subcarriers; the first two subcarriers are used to modulate the points of the dodecahedron vertices, and the other two subcarriers are used for the vertices of the dual (icosahedron). As shown in the table, we have four groups; the first group maps the input from the first four bitstreams onto 16 points of the 20 of the dodecahedron. The second group maps the input of two bitstreams onto the four vertices that form a tetrahedron. The selection of vertices for a subcarrier is done to maximize the distance between the points on the same subcarrier. In the Table, group N1 corresponds to 16-HAPP [6], and group N2 corresponds to 4-HAPP [5]. To increase the total rate of the system, we include the dual of this polyhedron, as follows. The third group maps the input from the two bitstreams onto 4 points of the 12 of the icosahedron, while the fourth group maps the input of the remaining three bitstreams onto the remaining eight vertices. In the Table, Group N3 corresponds to another form of a 4-HAPP, and group N4 corresponds to another form of 8-HAPP. The constellation for the four subcarriers results in a 32-H-SAPP that uses 11-bitstream input. 32-H-SAPP is shown in details in Fig. 2 . Selecting the number of subcarriers used in a system is based on the polyhedron of choice, in addition to the required final aggregate rate, as shown in the example above.
Table 2. Mapping rule lookup table for the 32-H-SAPP scenario.
Figure 2 shows the major components of the 32-H-SAPP. Figure 2(a) illustrates the dodecahedron. The 16 black points that are used in Group N1 and the 4 red points used in Group N2. Figure 2(b) represents the icosahedron. The 8 black points that are used in Group N4 and the 4 red points used in Group N3.
3. Simulation results
The proposed scheme is tested over an additive white Gaussian noise (AWGN) channel for a symbol rate of 50 GS/s, for 20 iterations of sum-product algorithm for the LDPC decoder, and 3 outer iterations between the LDPC decoder and the APP demapper. These simulations are done assuming an amplified spontaneous emission (ASE) dominated channel scenario. The coded bit sequence uses LDPC(16935, 13550) code of rate 0.8, which yields an actual effective information rate of the system of 3 × 50 × 0.8 = 120 Gb/s, 160 Gb/s, 240 Gb/s and 440 Gb/s for 8-HAPP, 16-HAPP, 20-H-SAPP and 32-H-SAPP respectively. Utilizing higher rate codes allows a higher actual transmission rate. The LDPC code used in this simulation is chosen after testing its suitability by the extrinsic information transfer (EXIT) chart analysis [10], and the number of inner and outer iterations is selected to provide a good balance between performance and latency.
The results of these simulations are summarized in Fig. 3 . In this figure, we show the uncoded and LDPC-coded BER performance versus the optical signal-to-noise ratio (OSNR) per information bit at 50GS/s. For the ASE-noise dominated scenario, the 8-HAPP scheme outperforms 8-QAM and 8-PSK by 2 dB and 4 dB at BER of 10−6 respectively. The 16-HAPP outperforms its 16-QAM by 1.1 dB. On the other hand, 20-H-SAPP that utilizes the 3D-space more efficiently increases the aggregate transmission rate by 80 Gb/s in comparison with 16-HAPP. Moreover, 32-H-SAPP that introduces the utilization of the dual polyhedrons increases the aggregate rate to 440 Gb/s. Although this scheme requires larger bandwidth compared to 20-H-SAPP, it can achieve 440 Gb/s serial optical transmission and as such is an excellent candidate for next generation 400 Gb/s optical transport and 400 Gb/s Ethernet.
4. Conclusion
In this paper, we present an LDPC-coded modified hybrid subcarrier/amplitude/phase/ polarization modulation that achieves 440 Gb/s of optical single-channel transmission using components operating at 50 GS/s. The proposed scheme can achieve 880 Gb/s once the 100 GS/s components become commercially available. This scheme is capable of dramatically increasing the aggregate rate of the system while keeping the power and bandwidth penalties somewhat affordable as a price to the final transmission rate. We show the performance of 32-H-SAPP in comparison with 20-H-SAPP and different HAPP schemes.
Acknowledgments
This work was supported in part the National Science Foundation (NSF) under Grant Integrative, Hybrid and Complex Systems (IHCS) 0725405.
References and links
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