1. Introduction

Optical integrated circuits have been developed to a high level of maturity such that sources, modulators and detectors with increasing performance have been regularly reported. However, there is still the problem of efficiently coupling optical fibers into these systems due to the large mismatch between the mode size and geometries of the waveguides and fibers. Therefore, several approaches such as prism coupling [1], tapered optical fibers and grating couplers [2] have been proposed. An ideal structure would be one that adiabatically tapers in both the vertical and lateral directions and can be monolithically integrated with photonic circuits. However, this cannot be readily achieved using standard binary lithography techniques.

More sophisticated techniques are required to achieve 3D control of waveguide structures and tapers. Processes that have been reported include dip-etch process [3], dynamic etch mask [4] and diffusion-limited etch [5] technique, however they normally involve numerous complex processing steps that are not particularly reproducible. Mechanical polishing has also been employed but it has limited application for wafer-level processing [6]. More recently, grayscale mask lithography of high-energy beam-sensitive glass has been patterned using electron beam writing, which is then used to create 3D structures into photoresist and then transferred into silicon through inductively coupled plasma etching [7].

Here, we report a direct-write technique for fabrication of 3D silicon waveguides that is compatible with standard Full Isolation by Porous Oxidized Silicon (FIPOS) technology [8]. Previously, FIPOS technology has only been used for device isolation and producing SOI substrates. However, the possibility for waveguide fabrication has not been really explored, with only one attempt reported by Arrand, et. al., [9]. In this paper, a focused beam of 250 keV protons is used to reduce the rate of porous silicon (PSi) formation, creating an unetched silicon core that is surrounded by PSi cladding. We show that the etch rate is strongly dependent on the irradiated dose, enabling us to accurately control the size of the waveguide core. Characterization of the waveguide was carried out at 1550 nm wavelength. Using the high spatial resolution of this direct-write process, the irradiated dose can be varied by dwelling the beam at each region for different amounts of time, to build up any pattern of the accumulated damage in the silicon. This allows us to create the desired waveguide profile in a single irradiation step. Waveguides can also be directly fabricated in silicon rather than expensive SOI substrates.

2. Experiment

Figure 1(a) shows the schematic diagram of the fabrication process. First, a highly focused beam of protons of 250 keV is irradiated into 0.7 Ω.cm resistivity (100) p-type silicon with a beam current of about 10 pA and a spot size of ~200 nm. This was carried out using a nuclear microprobe facility at the National University of Singapore [10]. The waveguide structure was written by translating the Inchworm stage on which the sample has been mounted. As the ion penetrates the material, lattice damage in the form of vacancy-interstitial (Frenkel) pairs are created along the ion track. For 250 keV protons, the number of Frenkel defects is reasonably constant along the first 2 µm of the trajectory, then increases sharply at the end-of-range at ~2.5 µm [Fig. 1(b)], [11]. Such irradiation increases the local resistivity of the material and reduces the free-carrier density [12]. During a subsequent electrochemical etching process, these defects act to trap holes from migrating to the silicon/electrolyte surface, reducing the rate of PSi formation in the irradiated regions. This process has already been successfully used for microfabrication of complex free-standing structures in silicon by subsequently removing the PSi layer [13,14] As the sample is etched beyond the depth of the ion range, the structure starts to become undercut due to the isotropic etching, producing a silicon core that is surrounded by PSi.

 

Fig. 1. (a). Schematic diagram of the fabrication process (b) SRIM simulation of the defect density profile of 250 keV protons in silicon.

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3. Results

Figure 2 shows the cross-sectional scanning electron microscopy (SEM) images of three silicon waveguides irradiated with different doses and a scan width of 2 µm. The sample has been etched at a current density of 40 mA/cm² in a solution of hydrofluoric acid (48%) and ethanol with a ratio of 1:1. After etching for 4 min, the silicon core becomes detached from the substrate and completely surrounded in PSi cladding. As the dose increases from 7×10¹³ to 8×10¹⁴/cm², both the core height and width get progressively bigger. Instead of a square profile, the irradiated structure has a trapezoid cross section spreading from the initial 2 µm at the surface to 3.5 µm at the end of range [Fig. 2(c)]. For 250 keV protons, the lateral spreading of ~200 nm of the beam does not account for the resultant shape.

 

Fig. 2. Cross sectional SEM of the waveguides irradiated with a dose of (a) 7×10¹³, (b) 1×10¹⁴ and (c) 8×10¹⁴/cm².

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These observations can be explained by simulations of hole transport through proton irradiated silicon of different doses during anodization [12]. The hole current flowing through the wafer is deflected away from the regions containing a high defect density, which widens the lateral width over which a reduced current density arrives at the surface. Thus, the current is deflected furthest away from the end of range region where the defect density is highest [Fig. 1(b)] and to a lesser extent by the lower defect density in the upper 2 µm. As the dose reduces, the current is able to bend around the high-defect-region and flow through the low-defect-density region. At low doses, only the highest density region at the end of range is left unetched, producing a smaller buried silicon core. We see that the core reduces from 3.5 µm down to 2.5 µm in width and from 2.6 µm down to 1.5 µm in height as a result of decreasing the proton dose by an order of magnitude.

 

Fig. 3. Plot of the core height and width as a function of dose.

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In order to determine the response of the etch rate to the damage created by the beam, we have plotted the height and width of the resultant structure as a function of dose (Fig. 3). Initially, the waveguide size increases rapidly as dose increases to 2×10¹⁴/cm², but after that no significant change is observed. At a high dose of 8×10¹⁴/cm², the etching stops and negligible current flows through the irradiated regions. The core height then corresponds to the full penetration depth of ~2.5 µm. This approach enables 3D control of the core size within this dose window, which is potentially important for fabrication of silicon tapers.

Optical characterization is carried out on the waveguide irradiated with the highest dose seen in Fig. 2(c). Using the fringe counting method from the white light reflectivity measurement [15], the refractive index of the PSi cladding is found to be 1.41, which is lower than 1.45 for conventional SiO₂ cladding. Prior to the measurement, the sample was annealed at 500°C for 2 hours in an inert argon atmosphere. Argon is used to prevent oxidation of the PSi layer, thus eliminating absorption in mid-IR wavelength regions due to an oxide layer. According to studies by Day, et. al., [16], temperatures of 400°C–450°C are sufficient to anneal out more than 90% of the defects caused by proton irradiation in silicon.

A free space 1550 nm laser was coupled to the waveguide using a 63× objective lens. A polarizing beam splitter and a half-wave plate were inserted into the beam path, enabling discrimination between the TE and TM polarizations. A highly sensitive Hamamatsu infrared camera (Model C2400-03) was used to locate the waveguide from above. The coupling of the laser beam to the waveguide is then optimized by adjusting the fine alignment of piezoelectric stages, until the maximum transmitted power is detected on the power meter. Figure 4(a) shows the scattered light from the top view of the waveguide and the output mode is imaged using a videcon IR camera [inset of Fig. 4(b)]. Since the waveguide is multimode, the mode field diameter is approximately the size of the core. This has been confirmed by simulations performed using a commercial beam propagation method software, BeamPROP™ [17]. Propagation loss was determined using the cutback method. In order to polish back the waveguides, they were first potted in a transparent wax (Crystal bond). The wax prevented the waveguides from moving and hence from being damaged during polishing. From the slope of the graph in Fig. 4(b), the waveguide shows a propagation loss of 6.7±0.8 dB/cm and 6.8±0.7 dB/cm in TE and TM polarization respectively. These losses are significantly smaller compared to values of ~20 dB/cm typically measured before annealing.

 

Fig. 4. (a). Top view of the scattered light from the waveguide (b) Plot of the output power of the waveguide as a function of guiding length, where the output power is defined as 10×log (P_out). Inset picture shows the output mode of the waveguide.

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Although higher than commercially available SOI waveguides (<1dB/cm), the losses are still lower than 7–50 dB/cm reported in PSi waveguides [9,18,19]. For the silicon wafer used in our study (resistivity ~0.7Ω.cm) the free carrier absorption will only contribute about 0.5 dB/cm to the propagation loss [20]. Therefore, the main contributions to the propagation loss is most likely due to absorption from residual defects, caused by the proton irradiation, and scattering loss from surface roughness. PSi based waveguides tend to suffer from scattering losses due to interface roughness formed at the PSi/Si front and Rayleigh scattering from the silicon nanocrystals [21]. Lerondel, et. al., [22] showed that the interface roughness is largely dependent on the current density and viscosity of the HF and can be relatively high for low doped p-type silicon. This will have a detrimental effect on waveguides with high index contrast, since the scattering loss scales proportionally to Δn²=(n² _core-n² _clad) [23]. Therefore, it is important to reduce the interface roughness to improve the loss. In our case, Rayleigh scattering will not be significant as the guiding medium used is silicon.

In order to determine the surface roughness of the waveguide, we have irradiated a test structure with the same conditions but etched for a shorter etching time so that it is still firmly attached to the substrate. Atomic Force Microscopy is then performed on the structure, after stripping the PSi layer with potassium hydroxide solution. Although the unirradiated regions show a high surface roughness of about 20 nm root-mean-square (RMS) roughness, the top surface and sidewalls of the waveguide are much smoother with a RMS of 4.5 nm and 12.6 nm respectively. This is comparable with values of 10 nm in the sidewall roughness obtained by conventional lithography and etching technique [24]. The irradiation process also influences the sidewall morphology of the waveguide due to beam intensity fluctuations from the accelerator [25], beam resolution and stage scanning speed [26]. Currently, we are investigating ways to reduce the surface roughness using different etching conditions and scanning parameters. Post-fabrication treatment such as oxidation and different annealing temperatures will also be explored in more detail in order to further reduce the propagation loss.

4. Conclusions

We have demonstrated the feasibility of writing silicon waveguides buried in PSi cladding using focused proton beam irradiation and electrochemical etching. Such a waveguide shows a propagation loss of 6.7 dB/cm in the TE and 6.8 dB/cm in the TM polarization at 1550 nm wavelength. As the rate of PSi formation depends on the ion beam damage, we are able to achieve 3D control of the core size with the ion dose. This provides a means of producing 3D tapers directly in silicon by accurate control of the dose of the finely focused ion beam. Due to its compatibility with standard FIPOS technology and fewer processing steps involved, this technique is potentially important for the integration of optical devices with microelectronics circuits.