Abstract

Picosecond electro-optic sampling (EOS) has already been demonstrated by several researchers^1-4 to represent a unique capability for direct non-invasive probing of GaAs integrated circuits with high temporal resolution. In this presentation, we describe the use of this capability for a detailed analysis of on-chip waveforms at critical internal nodes in gigabit sequential logic circuits. Besides providing vital timing information between such internal nodes (and thereby providing the first clear measurements of timing parameters such as set-up and hold-times in flip-flops, and gate propagation delays is normally-loaded and normally-exercised gates), such EOS measurements report the first observation of effects such as clock feedthrough at internal nodes, as well as provide indispensable information on the accuracy of the modelling/simulations (typ. SPICE) that are usually done for the analysis of quirks in the internal behavior of such circuits.

© 1987 Optical Society of America