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Architecture and Implementation: A Buffered ATM HyperPlane Smart Pixel Array

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Abstract

It has been realized that future high performance switching systems will be compromised by an interconnection bottleneck at the backplane level. Free-space optical technology promises to be an alternative to standard electrical interconnections as a way to alleviate this pending bottleneck. In addition, by using smart pixel arrays (SPAs) as the building blocks to create the free-space optical backplane, additional performance gains can be realized by embedding the switching intelligence into the backplane itself. In this paper, we present such a smart pixel array, which serves as the basic building block for a HyperPlane [1,2] based ATM switching fabric [3].

© 1997 Optical Society of America

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