Abstract

Current high performance switching and computing systems rely on an electrical interconnection network to transport information throughout the system for chip-to-chip and board-to-board communications [1]. This network however is limited relative to the bandwidth, connectivity, power consumption, and latency it offers. Because the aggregate bandwidth of the integrated circuits inside these systems continues to increase, so must the system's interconnection capabilities [2], The intrinsic limitations of current and projected electrical interconnection networks has lead system designers to consider optical interconnects deployed "inside the box" as a way of increasing system performance [3]. An optical backplanes is an example of such a system. The identification of critical issues in free-space optical backplanes is being pursued in the form of system demonstrator experiments [4-10]. Through the construction of several system demonstrators an iterative design, analysis, and implementation procedure has been used to address the critical issues associated with deploying optical interconnections at the board-to-board level. This talk will highlight the challenges and choices associated with the demonstrators.

© 1997 Optical Society of America