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Optical Computing Architectures and Logic Units

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Abstract

Nonlinear interference filters offer the prospect of 2-D arrays of all-optical memory and logic functions. In order to test the feasibility of these devices for information processing a sequence of optical arithmetic and logic units and associated circuit architectures have been designed. The 2-D schemes involve a parallel pipelined architecture with grid or shuffle interconnects between planes of processing elements. A sequence of bistable plates acts as a 2-D set of shift registers or time-delays, thus allowing synchronous operation of iterative circuits. Architectures for numeric processing (addition, multiplication, discrete Fourier transform), based on a single-pixel full-adder; and for cellular logic image processing (edge extraction, image expansion) are described. The experimental implementation of prototype circuits, to date of limited parallelism, is discussed. The design features required of the individual optically bistable and nonhysteretic nonlinear components are brought out and anticipated processing powers, based on the potential of various nonlinear etalon systems, are summarised.

© 1988 Optical Society of America

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