Abstract

A top layer of light modulating ferroelectric liquid crystal (FLC) turns a suitably designed VLSI memory into an electrically addressed spatial light modulator (SLM). The one-transistor dynamic register developed for electronic DRAM application also produces the densest SLM. We present such an SLM with elements on 20 μm centers and having a 72% fill factor. Its layout utilizes 2 μm CMOS design rules. We show 32 × 32 and 256 × 256 arrays; 512 × 512 arrays are feasible within standard silicon foundry photolithography capabilities. Address decoding electronics integrated with the modulator elements permit the SLM to be refreshed at frame rates up to 10 kHz; FLC response time limits optical cycling to 4 kHz. The refresh effectively overcomes photoinduced erasure of the dynamic element at incident intensities up to 10 mW/cm². We will discuss other SLM performance characteristics and project improvements that could be achieved with finer design rules and circuit planarization.

© 1992 Optical Society of America