Abstract

There is a growing demand to increase the throughput of high-speed processors and computers. To meet this demand, denser, higher-speed ICs and new computing architectures are being developed. Electrical interconnects and switching have been identified as bottlenecks to the throughput of computing systems. Two trends brought on by the need for faster computing systems have pushed the requirements on various levels of interconnects to the edge of what is possible with conventional electrical interconnects. The first trend is the development of higher speed and denser switching devices in silicon and GaAs. The second trend is the development of new architectures for increasing the parallelism, and hence, the throughput of a computing system. Optical interconnects can be applied, at least conceptually, at many levels within a computing architecture. On a physically large scale, optical interconnect technology has been used in local area networks to connect computers. At the next level down in physical size is the interconnection between systems within a computer such as a memory-to-processor connection. This is classified as a board-to-board or backplane interconnection. Next there are the interconnections between individual chips on a single board or between chips in a multichip package. Finally, there are the interconnections between devices within a single chip or on-chip clock distribution. Results pertaining to technology developments in optical routing techniques, packaging of optical and electronic components, high speed optoelectronic devices, and OI demonstrations are presented.

© 1986 Optical Society of America