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  • Conference on Lasers and Electro-Optics Europe
  • Technical Digest Series (Optica Publishing Group, 2000),
  • paper CWD1

Terabit/s parallel optical connections to silicon CMOS chips: lessons learned from the SPOEC technology demonstrator

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Abstract

Theoretical estimates suggest that the physical limit on electrical data communication rates between silicon chips is of the order of a few Tbit/s for connection lengths of over ~ 100 mm [1]. The semiconductor industry predicts that this level of input-output is likely to be required in the next ten years [2]. Free-space optical connections to silicon VLSI potentially offer much higher data-rates than electrical interconnects and are promising for future high-performance electronic systems.

© 2000 IEEE

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