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Single-chip, receiver/clock recovery circuit at 375 Mbit/s

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In computer applications of fiber optics the key requirements are data rate, packaging density, and low cost; transmission distance is of relatively low importance.1 Integration of the link electronic functions onto easily manufactured 1C chips is an important step toward these goals. We describe an optical receiver and phaselock loop clock recovery circuit implemented at 375 Mbit/s on a single chip representing a fourfold improvement in data rate over previous work2 (using the same process technology). The design techniques necessary to minimize injection locking of the oscillators at high speed are critical and described herein.

© 1986 Optical Society of America

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