Abstract

We propose and demonstrate a four-port mode-selective optical router on a silicon-on-insulator platform. The passive routing property ensures that the router consumes no power to establish the optical links. For each port, input signals with different modes are selectively routed to the target ports through the pre-designed architecture. In general, the device intrinsically supports broadcasting of multiplexed signals from one port to the other three ports through mode division multiplexing. In some applications, the input signal from one port would only be sent to another port as in reconfigurable optical routers. The prototype is constructed by mode multiplexers/de-multiplexers and single-mode interconnect waveguides between them. The insertion losses for all optical links are lower than 8.0 dB, and the largest optical crosstalk values are lower than −18.7 dB and −22.0 dB for the broadcasting and port-to-port routing modes, respectively, at the wavelength range of 1525–1565 nm. In order to verify the routing functionality, a 40-Gbps bidirectional data transmission experiment is performed. The device offers a promising building block for passive routing by utilizing the dimension of the modes.

© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

With the rapid development of nanoscale silicon photonic devices, photonic network-on-chip (NoC) has emerged as an alternative solution to the conventional electronic interconnect to meet the increasing chip-level interconnect requirements imposed on the bandwidth, latency, and power consumption [1–3]. An electro-optic system verification offering the optical interconnect between two processors has been reported [4]. Various architectures for photonic NoC have been studied, such as Mesh, Fat-Tree, and Clos [5–7].

Optical router, as a building block for light switching between different sources and destinations, has attracted a significant attention [8–22]. Based on whether the routing paths are established by dynamic tuning, the optical routers can be divided into active [8–17] and passive [18–22] routers. Routing states and routing paths of active optical routers are constructed by actively tuning the states of optical switching units, so that they can effectively reuse the interconnect waveguides and save the footprint. Active optical routers based on microring or Mach–Zehnder optical switches have been reported. In order to further increase the information capacity, mode-division multiplexing (MDM) is introduced as a promising technology, which allows multiple channels of information to be transmitted using the orthogonal spatial modes [23–30]. Several optical switches utilizing MDM have been demonstrated on a silicon photonics platform [31–33].

Compared with active routers, passive optical routers do not need the dynamic switching, and thus do not need power consumption and additional switching time to realize path steering. They would occupy significantly more interconnect waveguides to fulfill the one-to-one connectivity between different ports, and need additional labels (including wavelength/mode, corresponding active wavelength/mode converter, etc.) to distinguish signals from different ports. The wavelength-selective optical router, as a passive router, utilizes different wavelengths as labels to distinguish different routing paths. Many wavelength-selective optical routers based on microring resonators have been reported [18–21]. As they use different wavelengths as labels to route signals from sources to destinations, the channel numbers and channel spacing in wavelength-division multiplexing (WDM) applications are constrained by the characteristics of the resonance devices. In order to provide a more flexible use of the multi-wavelength channels, and further expand the information capacity as in active routers, MDM can be introduced into the passive routers.

In this paper, we propose and demonstrate a four-port mode-selective optical router on a silicon photonics platform. Input signals with different modes are selectively routed from the source ports to the target ports. In general, this device intrinsically supports a simultaneous signal routing from one port to the other three ports, while its routing rules can be limited to port-to-port pairs as in reconfigurable optical routers. In this case, it has the lightest load and lowest optical crosstalk. The mode multiplexers/de-multiplexers of the demonstrated device are based on asymmetric directional coupler (ADC), hence it has a relatively broad optical bandwidth. The total insertion loss of the device is smaller than 8.0 dB, while the largest optical crosstalk values are lower than −18.7 dB and −22.0 dB for the broadcasting and port-to-port routing modes, respectively, at the wavelength range of 1525–1565 nm. In order to verify its routing functionality, a 40-Gbps signal transmission experiment is performed.

2. Architecture and device design

The architecture of the proposed optical router is shown in the purple part of Fig. 1(a). It contains four input/output multimode waveguides supporting TE0, TE1, and TE2 modes, denoted as ports P1, P2, P3, and P4, four mode multiplexers/de-multiplexers, and six single-mode interconnect waveguides. Signal flows of the four ports are bidirectional, including one upstream signal and one downstream signal. In order to ensure the bidirectional transmission in the waveguides, different wavelengths are assigned for upstream and downstream signals. The function of the mode multiplexer/de-multiplexer is to multiplex fundamental-mode signals Pi0, Pi1, and Pi2 (i = 1, 2, 3, and 4) into multimode waveguides Pi or de-multiplex the multiplexed signals into fundamental mode signals, decided by the direction of signal flows. The most effective method to establish the one-to-one mapping between the modes and routing paths is to assign the minimum number of guided modes among the input–output port pairs while realizing the communications of input–output links without a conflict. The routing paths of the proposed device are illustrated in Table 1.

 

Fig. 1 (a) Architecture of the four-port mode-selective optical router. (b) Schematic of the three routing paths P1(TE0) →P2(TE0), P1(TE1) →P3(TE0), and P1(TE2) →P4(TE0) at the broadcasting routing mode. (c) Schematic of the two routing paths P1(TE1) →P3(TE0) and P2(TE2) →P4(TE1) at the port-to-port routing mode. Colored arrows and lines are used to outline different modes and operating routing paths.

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Tables Icon

Table 1. Routing paths of the four-port mode-selective optical router.

For example, communications can be established between the port P1 and other three ports P2, P3, and P4. Signals sent from port P1 should be in TE0, TE1, and TE2 modes, they are guided to the ports P2, P3, and P4, respectively. Oppositely, signals received by port P1 come from the other three ports P2, P3, and P4. We can distinguish the source port of the signal by the received mode sequence. In other words, the received signals in the TE0, TE1, and TE2 modes are sent from the ports P2, P3, and P4, respectively. In general, for a specific input/output port pair, we order the other three ports as 1st, 2nd, and 3rd based on the labeled sequence Pi. If the selected port functions as an input port, a signal sent from the TEi (i = 0, 1, 2) mode is guided to the (i + 1)th output port. If the selected port functions as an output port, a signal received from the TEi mode is sent from the (i + 1)th input port.

The proposed optical router can operate in the broadcasting routing mode as well as in the port-to-port routing mode. The broadcasting routing mode is used to deliver signals or clocks from one port to multiple ports. At this mode, multiplexed signals from one port are simultaneously sent to other multiple ports.

It is well known that the coupling between a multimode fiber and multimode waveguide is still challenging, hence auxiliary mode multiplexers/de-multiplexers are integrated to enable the device characterization, as shown in the green part of Fig. 1(a). Twelve single-mode auxiliary input/output ports are labeled, from A12 to  A42, where Aij (i = 1, 2, 3, 4, j = 0, 1, 2) represent the auxiliary port for the TEj mode of port Pi.

Figure 1(b) shows the signals routing from the port P1 to the other three ports. In this case, routing paths P1(TE0)→P2(TE0), P1(TE1)→P3(TE0), and P1(TE2)→P4(TE0) are established. In theory, each port can simultaneously support three upstream and three downstream signals. The port-to-port routing mode is a special case, which can be included in the broadcasting routing mode. Its routing characteristic is similar to that of the reconfigurable optical router, and is widely used in common situations. There are four routing paths in one routing state. Each routing path is established by a pair of an input and output ports. Figure 1(c) shows two routing paths P1(TE1)→P3(TE0) and P2(TE2)→P4(TE1) at this mode as an example. The colored arrows and lines in both cases are used to outline different modes and operating routing paths. Both routing modes of the architecture are non-blocking, and they indicate the worst and best evaluations of the crosstalk.

In the device design, silicon rib waveguides with a slab thickness of 70 nm and height of 220 nm are utilized. We select an ADC-based mode multiplexer/de-multiplexer, as it is compact and has a good scalability [29, 30]. Moreover, it has a relatively large optical bandwidth, which is compatible with WDM applications. The width of the rib waveguide carrying the TE0 mode is set to 400 nm, while the widths of the rib waveguides carrying the TE1 and TE2 modes are set to 920 nm and 1,420 nm, respectively. The coupling lengths for the TE1 and TE2 modes are 13 μm and 15 μm, respectively. The gap between two coupled waveguides is set to 250 nm. Adiabatic tapers with lengths of 10 μm are utilized to connect the waveguides with different widths.

3. Fabrication and experimental characterization

In the device fabrication, 248-nm deep ultraviolet photolithography is used to define the patterns, and inductively coupled plasma etching is employed to form the silicon waveguides. A 1,500-nm-thick silica layer is deposited on the silicon layer by plasma-enhanced chemical vapor deposition as the cladding layer. Figure 2 shows the micrograph of the fabricated device. The configuration of the six single-mode interconnect waveguides is slightly different from the architecture in Fig. 1(a), as we adjust the direction of the ADCs in mode multiplexers/de-multiplexers to reduce the number of waveguide crossings. A silicon inverse taper covered by an air-bridge silicon dioxide intermediate transition waveguide is used to reduce the coupling loss between the silicon waveguide and normal single-mode fiber [34, 35].

 

Fig. 2 Micrograph of the device. (MUX: multiplexer, DEMUX: de-multiplexer).

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The experimental setup for the device characterization is shown in Fig. 3. A single-mode fiber array is utilized to couple light into and out of the multiple ports of the device. An amplified spontaneous emission source and optical spectrum analyzer are utilized to characterize the static spectral responses of the device. The coupling loss between one waveguide and one single-mode fiber is 3 dB.

 

Fig. 3 Experimental setup for the device characterization (ASE: amplified spontaneous emission; TL: tunable laser; PC: polarization controller; DUT: device under test; PPG: pulse pattern generator; OSA: optical spectrum analyzer; DCA: digital communication analyzer; MD: modulator; FA: fiber array, CR: circulator).

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We consider the optical link A10A20 as an example to introduce the characterization method for the insertion losses and optical crosstalk values of the device at the broadcasting and port-to-port routing modes. At the broadcasting routing mode, each port Pi has three upstream and three downstream optical links. In the busiest case, 11 optical links are occupied. The blue bold line in Fig. 4(a) shows the transmission spectrum for the signal optical link A10A20. The insertion losses of this optical link are 1.1–4.4 dB at the wavelength range of 1525–1565 nm. The 10 color normal lines represent the transmission spectra for the noise optical links from the other 10 ports to port A20. In actual applications, inputs from different ports are incoherent with each other, hence the total noise for one specific optical link is a sum of the individual noises of the corresponding optical links. The red bold line shows the total noise from all of the other ports to port A20. In this case, the worst crosstalk performance is observed. The crosstalk of the optical link is in the range of −23.9 to −29.4 dB at the wavelength range of 1525–1565 nm.

 

Fig. 4 Signal and crosstalk for the optical link P1(TE0)→ P2(TE0) in the (a) broadcasting and (b) port-to-port routings.

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At the port-to-port routing mode, each port Pi has at most one upstream optical link and one downstream optical link. Therefore, for a specific port Pi, only one of the three auxiliary portsA10, Ai1, and Ai2 can be assigned as a signal input. With respect to the optical link A10A20, port A10 is used for the signal input. Therefore, ports A11 and A12 cannot be used for the signal input, and would not introduce a noise to A20. Similarly, for the remaining auxiliary ports, only three of them can be assigned to the signal input, introducing a noise to A20. In order to evaluate the crosstalk, first, we characterize the transmission spectrum of the signal optical link A10A20, which is the same as in the case in Fig. 4(a). In addition, we characterize the transmission spectra of the eight possible noise optical links, as shown by the normal color lines in Fig. 4(b). However, in one routing state, only three of them contribute to the noise of the signal optical link. We choose the transmission spectra of the three optical links with the largest losses to calculate the total noise, as shown by the bold red line in Fig. 4(b). The crosstalk of the optical link A10A20 is in the range of −26.5 dB to −35.1 dB at the wavelength range of 1525–1565 nm.

Using this method, we calculate the insertion losses and crosstalk of all 12 optical links at the broadcasting and port-to-port routing modes, as shown in Fig. 5. In both cases, the insertion losses are smaller than 8.0 dB, and the crosstalk is lower than −18.7 dB. The main factor leading to the fluctuations of these values is the performance variation of the ADCs, caused by fabrication imperfections. In our case, the mode multiplexers for the TE1 mode have larger insertion losses and leakages, therefore, the optical links related to the TE1 mode (i.e., A21A31, A21A41, A31A21) have larger insertion losses and crosstalk.

 

Fig. 5 Insertion losses and crosstalk values of the 12 optical links of the device.

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The experimental setup for data transmission is shown in the bottom half of Fig. 3. Continuous-wave light generated by a tunable laser is injected into a LiNbO3 optical modulator. A 40-Gbps pseudo-random binary sequence with a length of 231-1 is generated by a multi-channel pulse pattern generator, and employed to drive the LiNbO3 optical modulator. The modulated optical signal is coupled into and out of the device by a fiber array. The signal after the on-chip transmission is sent into a digital communication analyzer (DCA) for an eye diagram observation. In order to verify the bidirectional data transmission, two fiber-based three-port circulators are utilized. The three-port circulator has three ports, denoted as 1, 2, and 3. It supports the data transmissions of 1→2, 2→3, and 3→1, and blocks the reverse data transmissions. With the port configuration in Fig. 3, we can theoretically demonstrate a bidirectional data transmission for any optical link. As only one DCA and two circulators are employed, one optical link at a time can be characterized individually, eye diagrams for the bidirectional transmission can be collected separately by one input at a time. The optical link A21A31 had the largest insertion loss of 8.0 dB in the bidirectional data transmission experiment. The wavelengths for upstream and downstream data transmissions are set to 1550.0 nm and 1550.8 nm, respectively, with a channel spacing of 100 GHz. Figure 6 shows the observed eye diagrams. The eye diagrams after the bidirectional data transmissions are clear and open, not deteriorated compared with the back-to-back case.

 

Fig. 6 Measured eye-diagrams for the 40-Gbps bidirectional data transmission.

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Considering that a low-loss high-isolation circulator is still challenging to realize on the silicon photonics platform, two microring resonators operating at different wavelengths can be integrated to each port of the optical router. One of them is used for upstream, and the other one for downstream. This substitution can make the bidirectional transmission characteristic compatible with on-chip integration at the expense of decreasing the flexibility of the wavelength spacing.

4. Conclusion

We demonstrate a four-port mode-selective optical router on a silicon photonics platform. Three guided modes are assigned to distinguish the signal flows for different ports. ADC-based mode multiplexers/de-multiplexers provide the device with a relatively large optical bandwidth, beneficial for the increase of the communication capacity using WDM. The measured insertion losses of the device are lower than 8.0 dB, and the crosstalk values are lower than −18.7 dB and −22.0 dB for the broadcasting and port-to-port routing modes, respectively. In order to verify the routing functionality, a 40-Gbps bidirectional data transmission experiment is performed. The proposed device enlarges the building block library for passive routing by utilizing the dimension of the modes.

Funding.

National Key R&D Program of China (2017YFA0206402 and 2016YFB0402501), the National Natural Science Foundation of China (61575187, 61505198, 61535002, 61704168, 61235001).

References and links

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References

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  1. R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
    [Crossref]
  2. D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
    [Crossref]
  3. D. A. B. Miller, “Optical interconnects to electronic chips,” Appl. Opt. 49(25), F59–F70 (2010).
    [Crossref] [PubMed]
  4. C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
    [Crossref] [PubMed]
  5. A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
    [Crossref]
  6. H. Gu, J. Xu, and W. Zhang, “A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip,” in Proc. of the conference on Design, Automation and Test in Europe (2009), pp. 3–8.
  7. C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
    [Crossref]
  8. N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
    [Crossref] [PubMed]
  9. A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
    [Crossref]
  10. A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
    [Crossref]
  11. R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, and W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
    [Crossref] [PubMed]
  12. L. Chen and Y. K. Chen, “Compact, low-loss and low-power 8×8 broadband silicon optical switch,” Opt. Express 20(17), 18977–18985 (2012).
    [Crossref] [PubMed]
  13. R. Ji, J. Xu, and L. Yang, “Five-port optical router based on microring and switches for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(5), 492–495 (2013).
    [Crossref]
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  19. X. Tan, M. Yang, L. Zhang, Y. Jiang, and J. Yang, “A generic optical router design for photonic network-on-chips,” 30(3), 368–376 (2012).
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  20. T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
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  22. K. Chen, H. Gu, Y. Yang, and D. Fan, “A novel two-layer passive optical interconnection network for on-chip communication,” J. Lightwave Technol. 32(9), 1770–1776 (2014).
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2018 (1)

2017 (2)

2016 (1)

2015 (5)

2014 (6)

W. Jian, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), 18–22 (2014).
[Crossref]

Y. D. Yang, Y. Li, Y. Z. Huang, and A. W. Poon, “Silicon nitride three-mode division multiplexing and wavelength-division multiplexing using asymmetrical directional couplers and microring resonators,” Opt. Express 22(18), 22172–22183 (2014).
[Crossref] [PubMed]

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
[Crossref]

K. Chen, H. Gu, Y. Yang, and D. Fan, “A novel two-layer passive optical interconnection network for on-chip communication,” J. Lightwave Technol. 32(9), 1770–1776 (2014).
[Crossref]

L. Jia, J. Song, T. Y. Liow, X. Luo, X. Tu, Q. Fang, S. C. Koh, M. Yu, and G. Lo, “Mode size converter between high-index-contrast waveguide and cleaved single mode fiber using SiON as intermediate material,” Opt. Express 22(19), 23652–23660 (2014).
[Crossref] [PubMed]

2013 (4)

J. B. Driscoll, R. R. Grote, B. Souhan, J. I. Dadap, M. Lu, and R. M. Osgood, “Asymmetric Y junctions in silicon waveguides for on-chip mode-division multiplexing,” Opt. Lett. 38(11), 1854–1856 (2013).
[Crossref] [PubMed]

H. Qiu, H. Yu, T. Hu, G. Jiang, H. Shao, P. Yu, J. Yang, and X. Jiang, “Silicon mode multi/demultiplexer based on multimode grating-assisted couplers,” Opt. Express 21(15), 17904–17911 (2013).
[Crossref] [PubMed]

R. Ji, J. Xu, and L. Yang, “Five-port optical router based on microring and switches for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(5), 492–495 (2013).
[Crossref]

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
[Crossref]

2012 (1)

2011 (3)

2010 (3)

2009 (2)

A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

2008 (2)

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

2005 (1)

Alloatti, L.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Asanovic, K.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Assefa, S.

Atabaki, A. H.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Avizienis, R. R.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Batten, C.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

Beamer, S.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

Beausoleil, R. G.

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

Bergman, K.

Bergmen, K.

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Biberman, A.

A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

Cardenas, J.

Chen, C. P.

B. Stern, X. Zhu, C. P. Chen, L. D. Tzuang, J. Cardenas, K. Bergman, and M. Lipson, “On-chip mode-division multiplexing switch,” Optica 2(6), 530 (2015).
[Crossref]

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Chen, G.

Chen, H.

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, and W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
[Crossref] [PubMed]

A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

Chen, J.

Chen, K.

Chen, L.

Chen, Q.

Chen, Y. H.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Chen, Y. K.

Cong, G.

Cook, H. M.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Dadap, J. I.

Dai, D.

W. Jian, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), 18–22 (2014).
[Crossref]

Ding, J.

Doany, F. E.

Driscoll, J. B.

Fan, D.

Fang, Q.

Fu, X.

Gabrielli, L. H.

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Georgas, M. S.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Green, W. M. J.

Greenberg, M.

Grote, R. R.

Gu, H.

He, S.

W. Jian, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), 18–22 (2014).
[Crossref]

Holzwarth, C. W.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Hoyt, J. L.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Hu, T.

Huang, X.

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
[Crossref]

Huang, Y. Z.

Ikeda, K.

Jahnes, C. V.

Ji, R.

R. Ji, J. Xu, and L. Yang, “Five-port optical router based on microring and switches for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(5), 492–495 (2013).
[Crossref]

R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, and W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
[Crossref] [PubMed]

Jia, H.

Jia, L.

Jian, W.

W. Jian, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), 18–22 (2014).
[Crossref]

Jiang, G.

Jiang, X.

Joshi, A.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Kartner, F. X.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Kash, J. A.

Kawashima, H.

Khilo, A.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Kimura, T.

Koh, S. C.

Koshino, K.

Kuekes, P. J.

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

Kumar, R.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Kwon, Y. J.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

Kwong, D. L.

Lee, B.

A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
[Crossref]

Lee, B. G.

Lee, Y.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Leu, J. C.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Li, D.

Li, H.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Li, X.

Li, Y.

Li, Z.

Liboiron-Ladouceur, O.

Lin, S.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Liow, T. Y.

Lipson, M.

B. Stern, X. Zhu, C. P. Chen, L. D. Tzuang, J. Cardenas, K. Bergman, and M. Lipson, “On-chip mode-division multiplexing switch,” Optica 2(6), 530 (2015).
[Crossref]

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

Lo, G.

Lo, G. Q.

Lu, L.

Lu, M.

Lu, Y.

Luo, L. W.

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Luo, Q.

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
[Crossref]

Luo, X.

Luo, Y.

Matsumaro, K.

Miller, D. A. B.

D. A. B. Miller, “Optical interconnects to electronic chips,” Appl. Opt. 49(25), F59–F70 (2010).
[Crossref] [PubMed]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

Moss, B.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Moss, B. R.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Namiki, S.

Ohtsuka, M.

Ophir, N.

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Orcutt, J.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Orcutt, J. S.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Orenstein, M.

Osgood, R. M.

Ou, A. J.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Pavanello, F.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Poitras, C. B.

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Poon, A.

A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

Poon, A. W.

Popovic, M. A.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Priti, R. B.

Qiu, C.

Qiu, H.

Ram, R. J.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Schow, C. L.

Seki, M.

Shainline, J. M.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Shamim, I.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

Shao, H.

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
[Crossref]

H. Qiu, H. Yu, T. Hu, G. Jiang, H. Shao, P. Yu, J. Yang, and X. Jiang, “Silicon mode multi/demultiplexer based on multimode grating-assisted couplers,” Opt. Express 21(15), 17904–17911 (2013).
[Crossref] [PubMed]

Sherwood-Droz, N.

A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
[Crossref]

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

Smith, H. I.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Snider, G. S.

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

Song, J.

Song, J. F.

Souhan, B.

Stern, B.

Stojanovic, V.

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
[Crossref]

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

Stojanovic, V. M.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Suda, S.

Sugaya, T.

Sun, C.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Suzuki, K.

Tan, C. W.

Tanizawa, K.

Tian, Y.

Toyama, M.

Tu, X.

Tzuang, L. D.

Van Campenhout, J.

Vlasov, Y. A.

Wade, M. T.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Wang, H.

Wang, M.

Wang, S. Y.

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

Wang, W.

Wang, Y.

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
[Crossref]

Waterman, A. S.

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Williams, R. S.

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
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Xia, Y.

Xiong, Y.

Xu, C.

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
[Crossref]

Xu, F.

A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

Xu, J.

R. Ji, J. Xu, and L. Yang, “Five-port optical router based on microring and switches for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(5), 492–495 (2013).
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Yang, J.

Yang, L.

Yang, M.

Yang, S.

Yang, Y.

Yang, Y. D.

Ye, M.

Yokoyama, N.

Yu, H.

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
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H. Qiu, H. Yu, T. Hu, G. Jiang, H. Shao, P. Yu, J. Yang, and X. Jiang, “Silicon mode multi/demultiplexer based on multimode grating-assisted couplers,” Opt. Express 21(15), 17904–17911 (2013).
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Yu, M.

Yu, M. B.

Yu, P.

Yu, Y.

Yuan, C.

Zhang, D.

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
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Zhang, F.

Zhang, L.

Zhang, X.

Zhao, S.

Zheng, C.

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
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Zheng, L.

Zhou, L.

Zhou, P.

Zhou, T.

Zhu, W.

Zhu, X.

Appl. Opt. (1)

IEEE Photonics Technol. Lett. (3)

A. Biberman, B. Lee, N. Sherwood-Droz, M. Lipson, and K. Bergman, “Broadband operation of nanophotonic router for silicon photonic networks-on-chip,” IEEE Photonics Technol. Lett. 22(12), 926–928 (2010).
[Crossref]

R. Ji, J. Xu, and L. Yang, “Five-port optical router based on microring and switches for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(5), 492–495 (2013).
[Crossref]

T. Hu, H. Shao, L. Yang, C. Xu, M. Yang, H. Yu, X. Jiang, and J. Yang, “Four-port silicon multi-wavelength optical router for photonic networks-on-chip,” IEEE Photonics Technol. Lett. 25(23), 2281–2284 (2013).
[Crossref]

J. Lightwave Technol. (1)

Laser Photonics Rev. (1)

W. Jian, S. He, and D. Dai, “On-chip silicon 8-channel hybrid (de) multiplexer enabling simultaneous mode-and polarization-division-multiplexing,” Laser Photonics Rev. 8(2), 18–22 (2014).
[Crossref]

Nat. Commun. (1)

L. W. Luo, N. Ophir, C. P. Chen, L. H. Gabrielli, C. B. Poitras, K. Bergmen, and M. Lipson, “WDM-compatible mode-division multiplexing on a silicon chip,” Nat. Commun. 5, 3069 (2014).
[Crossref] [PubMed]

Nature (1)

C. Sun, M. T. Wade, Y. Lee, J. S. Orcutt, L. Alloatti, M. S. Georgas, A. S. Waterman, J. M. Shainline, R. R. Avizienis, S. Lin, B. R. Moss, R. Kumar, F. Pavanello, A. H. Atabaki, H. M. Cook, A. J. Ou, J. C. Leu, Y. H. Chen, K. Asanović, R. J. Ram, M. A. Popović, and V. M. Stojanović, “Single-chip microprocessor that communicates directly using light,” Nature 528(7583), 534–538 (2015).
[Crossref] [PubMed]

Opt. Express (13)

N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson, “Optical 4x4 hitless slicon router for optical networks-on-chip (NoC),” Opt. Express 16(20), 15915–15922 (2008).
[Crossref] [PubMed]

M. Yang, W. M. J. Green, S. Assefa, J. Van Campenhout, B. G. Lee, C. V. Jahnes, F. E. Doany, C. L. Schow, J. A. Kash, and Y. A. Vlasov, “Non-blocking 4x4 electro-optic silicon switch for on-chip photonic networks,” Opt. Express 19(1), 47–54 (2011).
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R. Ji, L. Yang, L. Zhang, Y. Tian, J. Ding, H. Chen, Y. Lu, P. Zhou, and W. Zhu, “Five-port optical router for photonic networks-on-chip,” Opt. Express 19(21), 20258–20268 (2011).
[Crossref] [PubMed]

L. Chen and Y. K. Chen, “Compact, low-loss and low-power 8×8 broadband silicon optical switch,” Opt. Express 20(17), 18977–18985 (2012).
[Crossref] [PubMed]

K. Tanizawa, K. Suzuki, M. Toyama, M. Ohtsuka, N. Yokoyama, K. Matsumaro, M. Seki, K. Koshino, T. Sugaya, S. Suda, G. Cong, T. Kimura, K. Ikeda, S. Namiki, and H. Kawashima, “Ultra-compact 32 × 32 strictly-non-blocking Si-wire optical switch with fan-out LGA interposer,” Opt. Express 23(13), 17599–17606 (2015).
[Crossref] [PubMed]

L. Lu, S. Zhao, L. Zhou, D. Li, Z. Li, M. Wang, X. Li, and J. Chen, “16 × 16 non-blocking silicon optical switch based on electro-optic Mach-Zehnder interferometers,” Opt. Express 24(9), 9295–9307 (2016).
[Crossref] [PubMed]

M. Ye, Y. Yu, G. Chen, Y. Luo, and X. Zhang, “On-chip WDM mode-division multiplexing interconnection with optional demodulation function,” Opt. Express 23(25), 32130–32138 (2015).
[Crossref] [PubMed]

H. Qiu, H. Yu, T. Hu, G. Jiang, H. Shao, P. Yu, J. Yang, and X. Jiang, “Silicon mode multi/demultiplexer based on multimode grating-assisted couplers,” Opt. Express 21(15), 17904–17911 (2013).
[Crossref] [PubMed]

Y. D. Yang, Y. Li, Y. Z. Huang, and A. W. Poon, “Silicon nitride three-mode division multiplexing and wavelength-division multiplexing using asymmetrical directional couplers and microring resonators,” Opt. Express 22(18), 22172–22183 (2014).
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M. Greenberg and M. Orenstein, “Multimode add-drop multiplexing by adiabatic linearly tapered coupling,” Opt. Express 13(23), 9381–9387 (2005).
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H. Jia, L. Zhang, J. Ding, L. Zheng, C. Yuan, and L. Yang, “Microring modulator matrix integrated with mode multiplexer and de-multiplexer for on-chip optical interconnect,” Opt. Express 25(1), 422–430 (2017).
[Crossref] [PubMed]

Q. Fang, T. Y. Liow, J. F. Song, C. W. Tan, M. B. Yu, G. Q. Lo, and D. L. Kwong, “Suspended optical fiber-to-waveguide mode size converter for silicon photonics,” Opt. Express 18(8), 7763–7769 (2010).
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L. Jia, J. Song, T. Y. Liow, X. Luo, X. Tu, Q. Fang, S. C. Koh, M. Yu, and G. Lo, “Mode size converter between high-index-contrast waveguide and cleaved single mode fiber using SiON as intermediate material,” Opt. Express 22(19), 23652–23660 (2014).
[Crossref] [PubMed]

Opt. Lett. (3)

Opt. Quantum Electron. (1)

Q. Luo, C. Zheng, X. Huang, Y. Wang, and D. Zhang, “Polymeric N-stage serial-cascaded four-port optical router with scalable 3N channel wavelengths for wideband signal routing application,” Opt. Quantum Electron. 46(6), 829–849 (2014).
[Crossref]

Optica (3)

Proc. IEEE (3)

A. Poon, X. Luo, F. Xu, and H. Chen, “Cascaded microresonator-based matrix switch for silicon on-chip optical interconnection,” Proc. IEEE 97(7), 1216–1238 (2009).
[Crossref]

R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S. Y. Wang, and R. S. Williams, “Nanoelectronic and nanophotonic interconnect,” Proc. IEEE 96(2), 230–247 (2008).
[Crossref]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

Other (4)

A. Joshi, C. Batten, Y. J. Kwon, S. Beamer, I. Shamim, K. Asanovic, and V. Stojanovic, “Silicon-photonic clos networks for global on-chip communication,” in Proc. 3rd ACM/IEEE International Symposium on Networks-on-Chip (2009), pp. 124–133.
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H. Gu, J. Xu, and W. Zhang, “A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip,” in Proc. of the conference on Design, Automation and Test in Europe (2009), pp. 3–8.

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, “Building manycore processor-to-DRAM networks with monolithic silicon photonics,” in IEEE High-Performance Interconnects Symposium (2008), 21–30.
[Crossref]

X. Tan, M. Yang, L. Zhang, Y. Jiang, and J. Yang, “A generic optical router design for photonic network-on-chips,” 30(3), 368–376 (2012).
[Crossref]

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Figures (6)

Fig. 1
Fig. 1 (a) Architecture of the four-port mode-selective optical router. (b) Schematic of the three routing paths P1(TE0) →P2(TE0), P1(TE1) →P3(TE0), and P1(TE2) →P4(TE0) at the broadcasting routing mode. (c) Schematic of the two routing paths P1(TE1) →P3(TE0) and P2(TE2) →P4(TE1) at the port-to-port routing mode. Colored arrows and lines are used to outline different modes and operating routing paths.
Fig. 2
Fig. 2 Micrograph of the device. (MUX: multiplexer, DEMUX: de-multiplexer).
Fig. 3
Fig. 3 Experimental setup for the device characterization (ASE: amplified spontaneous emission; TL: tunable laser; PC: polarization controller; DUT: device under test; PPG: pulse pattern generator; OSA: optical spectrum analyzer; DCA: digital communication analyzer; MD: modulator; FA: fiber array, CR: circulator).
Fig. 4
Fig. 4 Signal and crosstalk for the optical link P1(TE0)→ P2(TE0) in the (a) broadcasting and (b) port-to-port routings.
Fig. 5
Fig. 5 Insertion losses and crosstalk values of the 12 optical links of the device.
Fig. 6
Fig. 6 Measured eye-diagrams for the 40-Gbps bidirectional data transmission.

Tables (1)

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Table 1 Routing paths of the four-port mode-selective optical router.

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