## Abstract

Silicon has recently attracted a great deal of interest as an economical platform for integrated photonics systems. Integrated photodetectors are a key component of such systems, and CMOS-compatible processes involving epitaxially grown germanium for photodetection have been demonstrated. Detector parasitic capacitance is a key limitation, which will likely worsen if techniques such as bump bonding are employed. Here we propose leveraging the complexity available in silicon photonics processes to compensate for this using a technique known as gain peaking. We predict that by simply including an inductor and capacitor in the photodetector circuit with the properly chosen values, detector bandwidths can be as much as doubled, with no undesired effects.

©2012 Optical Society of America

## 1. Introduction

Silicon shows promise as an economical platform for integrated photonics systems, due to the large infrastructure in place from the silicon electronics industry, as well as silicon’s intrinsic manufacturability [1–3]. However, in many situations, the device performance of silicon is still inferior to that of conventional optical systems, such as III-V semiconductor materials [4, 5] or lithium niobate [6]. One way of circumventing this limitation is to leverage the complexity that is increasingly available in silicon photonics processes [2, 3]. We will show that with the metal layers typically available in a CMOS-compatible process [7], it is possible to dramatically enhance the performance of waveguide-coupled photodetectors.

Germanium photodetectors are now widely used [8–14] for integrated photodetection on the silicon platform. Typically PIN diodes are used, though photoconductive detectors have also been demonstrated [11, 12]. Germanium can be readily integrated into a silicon system through epitaxy [14]. A significant drawback of using germanium for photodetection at 1550 nm is the relatively low absorption coefficient of 0.2 dB/µm [15], which has prompted some work to be done at 1310 nm where the absorption is much higher [16]. Due to the low absorption, the physical size of germanium detectors often needs to be large in order to achieve high responsivity, which in turn creates a large capacitance. Detectors with areas of 60 µm^{2}, 370 µm^{2} and 700 µm^{2} are typical in the literature, with corresponding detector capacitances of 32 fF, 66.7 fF and 200 fF, respectively [8, 9, 10]. Often, the bandwidth of a photodetection circuit can be modeled as a simple RC load. Taking f_{c} to be the 3-dB frequency (at which point the photocurrent has decreased by a factor of $\sqrt{2}$), C_{pd} the detector capacitance, R_{l} the load resistance, and R_{pd} the photodetector resistance, which is in general a combination of contact resistance to the n and p regions of a photodiode and the series resistance between the contacts and the photocurrent-generating intrinsic region:

The associated circuit is shown in Fig. 1
. We note that R_{l} could indicate the input to a transimpedance amplifier (TIA), or simply a 50-Ω transmission line.

Clearly larger detector capacitances will degrade device bandwidth. As a result, a natural avenue for bandwidth improvement has been to decrease device capacitance [17]. A secondary consideration in photodetector design is the transit-time limitation [18]. In a p-i-n detector, free carriers are created in the germanium intrinsic region due to photo-absorption, and they must be swept to the p- or n-doped collection regions. This transit time limits photodetector bandwidth in some situations. A natural approach to decreasing transit time is to narrow the intrinsic region; however, this comes at the expense of increased detector capacitance [18]. Decreasing the relative importance of detector parasitic capacitance will thus be of significance for this aspect of photodetector design as well. For simplicity, we will assume that the photodetectors we describe here are not transit-time limited.

Recently, significant improvements have been made in detector capacitance through using very small area photodetectors, with capacitance values of 1.2 fF demonstrated while still maintaining a responsivity of 0.8 A/W and bandwidths of 45 GHz [19]. Actually, even in this situation, capacitance can become a limitation. It is often desirable to use a load with higher resistance. As we will show, the associated bandwidth for a given RC circuit can still be improved, even for loads of 1 kΩ or more.

There are still several reasons to expect that larger area photodetectors will continue to be used, and that capacitance will remain a limitation. First, these smaller geometries may not be compatible with already existing and well-characterized photonics processes [9, 14, 20]. Second, increasing photodetector power handling levels may require larger area detectors, or equivalently, multiple photodetectors in parallel. It is also sometimes necessary to accommodate more than one mode in a single photodetector in order to support polarization diversity [20]. Finally, if bump bonding is employed to bond an electronic chip, then this too raises the effective parasitic capacitance of the detector [21].

As silicon photonics processing has matured, an increasing level of complexity has become available. It is not uncommon for there to be several layers of metal available in wafer-scale processes [7], as shown in Fig. 2 , and for silicon-on-insulator (SOI) with a high-resistivity handle wafer to be used [22], allowing high Q inductors. Metal-insulator-metal (MIM) capacitors will also likely be available as CMOS-compatible processes are adapted to address silicon photonics [22, 23]. Crucially, as part of a monolithically integrated back-end, these components can be built directly adjacent to integrated waveguide-coupled photodetectors.

Assuming that a thicker, low-resistance metal is available, it should be possible to fabricate high quality inductors if a high-resistivity handle wafer is used [22]. The availability of this component in close proximity with the photodetector allows a technique typically used in amplifier design known as gain peaking [24, 25] to be directly adapted to the silicon photonics platform. There are three variants that we describe. First, simple series gain peaking involves placing an inductor in series with the signal from the photodetector and the load; in this fashion, bandwidth can almost always be improved by around 40%. For a more advanced configuration involving a second capacitance, we show that improvements by as much as 100% are possible. Finally, for a technique we call shunt gain peaking, the maximum operating frequency can be increased by many times if narrow-band operation is acceptable.

Before specific gain peaking circuits can be discussed, however, the key parasitic value R_{pd} needs to be quantified. While detector capacitance is usually reported in the literature, R_{pd} generally is not. If a geometry is known to not be transit-time limited, and the capacitance is known, then R_{pd} can be derived from the bandwidth using Eq. (1). For a typical value, consider the 35.2 fF, 2.3 µm x 64 μm detector studied in [19]; R_{pd} can be calculated to be 130 Ω.

## 2. Gain peaking enhanced photodetector circuits

#### 2.1 Series gain peaking

Consider adding an inductor in series with the load of a photodetector, as shown in Fig. 3 .

Here the new element L_{pk} is the gain peaking inductor. The maximum bandwidth of this detector will no longer have the form shown in Eq. (1), but instead will have the form:

This will occur if the value of the inductor is chosen to be:

To take a concrete example, consider the previously described detector [19] with values C_{pd} of 35.2 fF and R_{pd} of 130Ω. For a 50Ω load the un-peaked bandwidth would be 25 GHz. The gain peaked bandwidth is 35.5 GHz. The inductance L_{pk} needed is 0.57 nH. We show the normalized responsivity, and phase shift of the photodetector circuit, in Fig. 4
. Here phase shift refers to the AC phase shift between the current through the load resistance, and the current produced by the photodetector.

One key issue is that of dispersion; a deviation from a linear relation between the phase shift of the circuit and frequency implies a non-uniform time delay for different frequencies, which would distort signals. In this example, the maximum level of dispersion is 0.3 ps of excess delay for the frequency 30 GHz, which is a small fraction of the period of the 35.5 GHz bandwidth, and therefore is likely not an issue.

As we will discuss in a later section, the inductance value of 0.57 nH is plausible for an integrated inductor in the process described earlier. We note that this large bandwidth improvement is due to nothing more than a simple spiral inductor, which could be placed between one contact on the detector and 50-Ω contact pads for an externally coupled photodetector. Note that as long as the detector is not transit-time limited, a bandwidth enhancement of 40% is always possible, regardless of R_{pd}.

#### 2.2 Enhanced series gain peaking

Consider adding a capacitor C_{l} to the circuit shown Fig. 3 in parallel with the load, as shown in Fig. 5
. This could correspond to a parasitic capacitance due to bump bonding [21] or from another source. Traditionally this capacitance would be seen as an undesirable parasitic, and would have further degraded photodetector bandwidth; however, with the right choice of inductor, this capacitance can actually lead to enhanced performance. Therefore, it might also prove desirable to intentionally add this capacitance, perhaps with a MIM capacitor.

Unfortunately closed form expressions for the optimal choices of L_{pk} and C_{l} are not readily available to the authors. However by performing a simple 2-dimensional gradient follow maximizing the 3-dB bandwidth, a numerical solution is possible. The magnitude of the frequency response can be written as

The additional pole created by the insertion of the load capacitor allows for bandwidth extension beyond the simple series peaking case if R_{pd} is less than R_{l}. Significant enhancements can be obtained, though generally speaking R_{pd} needs to be significantly smaller than R_{l} for 100% improvements in bandwidth to be approached. For many photodetectors R_{pd} is comparable to or larger than R_{l}, and so further process development may be required to fully realize these bandwidth enhancements. Alternatively, higher load resistances can be used, though eventually the required inductances rise to a challenging level. Table 1
shows the optimal choices of C_{l}, L_{pk} in a number of situations, and the new cutoff frequency in an enhanced gain peaking circuit, f_{c}’. The detector parasitics R_{pd} and C_{pd}, as well as the load resistance R_{l} were chosen to represent realistic integrated detector systems. In the first 3 examples, we have opted to use a somewhat higher detector capacitance of 100 fF to represent a longer detector for which the lower parasitic resistances of 5 Ω and 25 Ω are more plausible. The final example uses the values from the previously described detector from literature [19].

The values for L_{pk} and C_{l} were obtained in each situation by applying a simple optimization algorithm. The first step in the algorithm is to obtain the 3-dB frequency numerically from Eq. (4) over a range of these values, starting at 0 for both quantities. A maximum search can then be performed over the range to obtain the optimal values of C_{l} and L_{pk}, as well as the associated maximum cut-off frequency. If the maximum occurs along either of the upper boundaries of the range, the algorithm should be repeated with a larger range along the appropriate dimension.

The normal and enhanced gain peaked bandwidths are shown for example 2 in Fig. 6 .

In the case of Fig. 6, the maximum dispersion is around 0.6 ps of extra delay at 46 GHz, which is likely negligible.

#### 2.3 Shunt peaking

It is well known that the performance of CMOS circuits, typically limited by gate capacitances, can be enhanced through inductance [24, 25]. In particular, circuits can be made narrow-band at frequencies well above the range at which broadband amplifiers can be constructed. The same idea can readily be applied to capacitance-limited photodetectors. Figure 7
shows a detector circuit in what we call a shunt peaked configuration. Note than an extra blocking capacitor C_{b} is present, to prevent a short at low speed.

The behavior of this circuit can be understood by taking the limit as the blocking capacitance goes to infinity. In this limiting case the peak frequency (f_{peak}), peak responsivity gain (G_{peak}) and 3dB bandwidth (Δf_{3dB}) of the shunt peaked detector all reduce to simple expressions:

It is interesting to note that the gain-bandwidth product is constant and equal to the un-peaked detector bandwidth. The responsivity gain is always less than 1 for this circuit.

From Eq. (6), it is clear that R_{pd} needs to be decreased substantially to fully realize the benefits of this geometry. But if this can be accomplished, operating frequencies of the shunt peaked detector can be extended to well beyond what could be achieved with even enhanced series peaking. For example, if C_{pd} = 100 fF, R_{pd} = 2 Ω, R_{l} = 50Ω, L_{pk} = 50 pH, and C_{b} = 1 pF, the shunt peaked photodetector will exhibit 82% of the DC responsivity at 73.4 GHz, with a 3 dB bandwidth of 34.3 GHz; that is, an operating window from 59.1 GHz to 93.4 GHz. The original, un-peaked bandwidth of this detector would be 30.6 GHz. Figure 8
shows the normalized photocurrent as a function of frequency. Again, here we have selected an example detector capacitance of 100 fF to represent a longer detector than the example from literature [19] since R_{pd} must be small for this technique to be attractive.

## 3. Inductor parasitics and noise sources

#### 3.1 Inductor geometry and parasitics

Integrated inductors sometimes require large areas, and inevitably imply parasitic resistances, as well as self-capacitances. Fortunately, the typical inductance that would be needed for a gain peaking circuit can be easily realized with the geometry described in Fig. 2. Consider an inductor formed by a two-loop square spiral with 10 µm wide traces, as shown in Fig. 9 . The outer loop traces a 65-µm square (center of the trace), while the inner loop traces a 50-µm square. The total area used for the inductor is a 75 µm x 75 µm square.

The bulk of the inductor is made from the thicker top metal layer, while the lower metal layer is used for the metal crossing. A full 3-dimensional electromagnetic simulation of the inductor was performed using commercial software (HFSS from Ansys). The results show that the structure will have an inductance of 290 pH, a self-capacitance of 6 fF, and a series resistance of 0.6 $\Omega /\sqrt{GHz}$. The parasitic resistance and self-capacitance are both small fractions of the load and photodetector parasitics described in section 2.1; we can thus expect the parasitic values to have little impact on the performance of the photodetector circuit, at least for conventional gain peaking.

#### 3.2 Noise analysis

Pure inductance and capacitance are considered noiseless, but the parasitic resistance in series with the inductor contributes thermal noise to the output. Using two-port analysis one can refer this contribution back to the input port, as a noise current in parallel with the photocurrent source for fair comparison between different circuit topologies [26].

It is straightforward to show that for series peaking and enhanced series peaking, the input-referred noise current spectrum density is

where k is the Boltzmann constant, T is the temperature of the circuit and R_{series}is the series resistance of the inductor. As a comparison, the input-referred noise due to R

_{pd}is

Therefore as long as R_{series} is small compared to R_{pd} within the operating frequency bandwidth, the series peaking technique does not introduce significant noise.

For shunt peaking, neglecting C_{b}, the input-referred noise due to R_{series} can be expressed as:

The total output noise in the circuit illustrated in Fig. 7 will have to include the noise contribution of the load [26]. Here we assume a 50 Ω resistive load, which is equivalent to assuming a TIA with 3dB noise figure or a 50 Ω terminated transmission line. This load exhibits a noise current of

when referred to the input. The ratio of the excess noise introduced by shunt peaking to the noise from the load is thus:Using the parameters in the shunt peaking example near mid-band, at 80 GHz this ratio is 0.4. It is important to note that in addition to thermal noise a, typical optical receiver end also suffers from shot noise and relative laser intensity noise, which are usually the dominating factor in the normal operation regime of a photodetector [27]. It can be shown that the shot noise will be as large as the total thermal noise from various sources in the shunt peaking circuit when the photocurrent is 1.4 mA. Therefore for photodetectors operating with this level of current or higher, the shunt peaking technique has an increasingly small impact on the overall noise performance.

## 4. Conclusions

We have shown that using properly chosen inductors, it is always possible to improve the bandwidth of a capacitance-limited photodetector by at least 40%. All that is required are two metal layers. A large number of photodetectors reported in the literature could likely have their performance improved through the use of this technique [8–10, 19]. It is also possible in some circumstances to increase the bandwidth even beyond this value if the parasitic resistance of the photodetector is low. We believe that future silicon photonics detectors should leverage the complexity available in the CMOS compatible silicon photonics platform to improve performance in this fashion.

## Acknowledgments

The authors would like to thank Gernot Pomrenke, of the Air Force Office of Scientific Research, for his support under the OPSIS and PECASE programs, and would like to thank Mario Panniccia and Justin Rattner, of Intel, for their support of the Institute for Photonic Integration. The authors would also like to thank Mentor Graphics for their support of the OPSIS project. Software donated by Ansys (HFSS) was vital to this work and is gratefully acknowledged.

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