All-optical AND and NAND gates have been demonstrated in a Ti-diffused periodically poled LiNbO3 channel waveguide which has two second-harmonic phase-matching peaks by cascaded sum-frequency-generation/difference-frequency-generation (cSFG/DFG) and sum-frequency-generation (SFG) processes. The conversion efficiency of signal to idler (AND gate signal) was approximately 0 dB in cSFG/DFG process. In the second SFG process, more than 15 dB extinction ratio between signal and dropped signal (NAND gate signal) has been observed.
©2006 Optical Society of America
All-optical signal processing is one of the main issues in communications and computation fields because it can handle large bandwidth signals and information flows. All-optical logic gate devices are key elements in all-optical signal processing and future all-optical time-division multiplexed (OTDM) network. The logic gates execute essential signal processing functions at the nodes of network such as pattern matching, header recognition processing, switching and contention resolution. All-optical logic gate devices can be classified into several types such as fiber nonlinearity-based logic gates , semiconductor optical amplifier (SOA)-based logic gates [2, 3, 4], microresonator-based logic gates [5, 6] and periodical poled LiNbO3 (PPLN)-based logic gates [7, 8, 9]. AND/NAND logic gates are fundamental devices of header recongnition in photonic switching nodes. Although several types of all-optical AND/NAND logic gates have been demonstrated, PPLN-based all-optical AND/NAND gates have not been demonstrated yet. PPLN-based all-optical logic gates are very promising because they have several good properties such as high speed, low noise level and high efficiency. However, researches on PPLN-based devices have been limited in all-optical wavelength conversion , all-optical switching [8, 11], all-optical add/drop multiplexing  and all-optical AND logic gate [8, 9]. In this paper, we demonstrate, for what we believe is the first time, all-optical AND/NAND gates in a Ti-diffused periodically poled LiNbO3 (Ti:PPLN) channel waveguide which has two second-harmonic (SH) phase-matching peaks by cascaded sum-frequency-generation/difference-frequency-generation (cSFG/DFG)  and sum-frequency-generation (SFG) processes.
The second-harmonic (SH) curve of an 80-mm-long Ti:PPLN waveguide (width:7-μm) with 16.6-μm microdomain period is shown in Fig. 1. The waveguide was fabricated upon the 0.5-mm-thick Z-cut LiNbO3 substrate along the X-axis. The waveguide loss at 1.53 μm wavelength (TM-polarization) was determined by the Fabry-Perot method  to be 0.12 dB/cm. One side of the sample was angle polished to avoid internal multiple reflection of waves. The wavelengths of the two high peaks at room temperature are 1530.11 nm and 1530.39 nm, respectively, as shown in Fig. 1. Double- or multiple-SH peaks have been frequently observed in Ti:PPLN waveguides owing to unexpected fabrication faults such as non-uniform periodicity of quasi-phase -matched (QPM) grating or inhomogeneity of refractive index along the waveguide . Those peaks are also observable in intentionally engineered non-uniform QPM grating , phase-modulated domain structure  and uniform QPM grating which has local temperature gradient .
The operation principle of the proposed all-optical AND/NAND logic gates is shown in Fig. 2 (phase-matching characteristics curves). If the SH curve of a Ti:PPLN waveguide has double peaks, such as Fig. 1, each peak can serve for independent nonlinear process. The AND gate operation can be illustrated in the second phase matching curve (Fig. 2) by cSFG/DFG process. In the cSFG/DFG process, two pump waves are used; the first pump at frequency ω p1 converts a incoming signal ω s1 to a sum frequency wave ω SF1 = ω p1 + ω s1 perfectly phase matched SFG process. The second pump ω p2 simultaneously mixes with the sum frequency to generate a frequency shifted idler ωi = ω SF1 - ω p2 by DFG process. Even though the DFG process is phase mismatched, the conversion efficiency is only slightly reduced for a wide frequency range in comparison to a phase matched interaction. Under the slowly varying approximation, the cSFG/DFG process is determined by the following simplified coupled equations :
where ΔβSFG1 = βSF1 - βs1 - βp1, ΔβDFG = βSF1 - βp2 - βi, d(z) is the second-order nonlinear susceptibility, Aj is the field amplitude at the corresponding frequency, C SFG1 and CDFG are the quantities determined by the transverse overlap between the interacting field as follow.
If the pump2 wave (λp2) is existed, the idler wave (λi) is generated when signal1 wave (λs1) and pump wave (λp1) are ON state simultaneously. Subsequently, if idler wave is generated, signal2 wave (λs2) can be dropped by the amplified idler through another SFG process in the first phase-matching curve (Fig. 2). In other words, the NAND gate operation can be obtained in the first phase-matching curve. The SFG process can be described by the following coupled mode equations:
where ΔβSFG2 = βSF2 - βs2 - βi and C SFG2 = ∫∫E SF2(x,y)(x,y)(x,y)dxdy.
The experimental setup for all-optical AND/NAND gates is shown in Fig. 3. An external cavity laser (ECL1: 1540.9 nm) was combined with another ECL (ECL2: 1560.16 nm) in a fiber-optic 3-dB power coupler, then two waves were amplified by a high power erbium-doped fiber amplifier (EDFA2). Both waves served as pumps for cSFG/DFG process. Two pump waves were combined again with an amplified DFB1 (1554.66 nm) signal in a 10:90 fiber-optic coupler and launched into the channel waveguide by butt-coupling. The temperature of the Ti:PPLN waveguide was kept at 150 °C to reduce photorefractive damage [20, 21] and to adjust SHG phase-matching wavelengths to about 1547.5 nm. The SH phase-matching wavelengths were shifted to longer wavelengths with temperature increase at a rate of ~ 0.137 nm/K (red shift). At the temperature of 150 °C, the wavelengths of the two SH high peaks were 1547.46 nm and 1547.74 nm, respectively. When the pump from ECL2 exists, the idler can be generated by cSFG/DFG process  only if simultaneously ECL1 and DFB1 are ON states (see Fig. 4(d)). This cSFG/DFG process (AND gate) was realized by the second SH peak (the second phase-matching condition) in Fig. 1. The generated idler was filtered by cascaded band-pass filters and amplified by EDFA3. The signal wave of DFB2 and the amplified idler were superimposed in a 10:90 fiber-optic coupler and launched into the channel waveguide in the reversal direction. By changing the wavelength of pump2 (ECL2), the wavelength of idler was tuned for satisfying the second SFG condition. The signal wave of DFB2 was dropped whenever the idler existed (see Fig. 5(d)). This SFG process (NAND gate) was due to the first SH peak (the first phase-matching condition) in Fig. 1. In other words, the idler generated in AND gate operation was used as the pump in NAND gate operation through the optical feed-back loop. The polarization states of all waves were controlled with fiber optic polarization controllers (PCs).
The results of all-optical AND gate experiment are shown in Fig. 4. The optical spectra were measured by optical spectrum analyzer (OSA1) in Fig. 3. The idler signal (AND gate signal) was not generated in the cases of 1st state (ECL1:OFF, DFB1:OFF), 2nd state (ECL1:OFF, DFB1:ON) and 3rd state (ECL1:ON, DFB1:OFF) (see dot circles in Fig. 4(a), (b) and (c)). Note that the idler was generated by cSFG/DFG process when ECL1 and DFB1 was ON state (see Fig. 4(d)). The coupled power levels of pump1 (ECL1) and pump2 (ECL2) waves were 25.8 and 24.5 dBm, respectively. The conversion efficiency from the signal1 (DFB1) to the generated idler was measured approximately 0 dB. Fig. 5 represents the optical spectra of all-optical NAND gate experiment. Note that this NAND gating is achieved by another SFG with the idler and the DFB2 signal. Whenever the idler exists, the DFB2 signal is dropped by the first phase-matching condition of the Ti:PPLN waveguide. The extinction ratio of the depleted signal (DFB2) was more than 15 dB at the coupled pump (amplified idler) power of 22.5 dBm. The truth table for all-optical AND/NAND gate operations is shown in Table. 1 truth table.
We have demonstrated, for what we believe is the first time, all-optical AND/NAND logic gates on the basis of cSFG/DFG and SFG processes in a Ti:PPLN waveguide that had two SH phase-matching peaks. The conversion efficiency of signal to idler in cSFG/DFG process (AND gate) was approximately 0 dB with the first pump1 power of 25.8 dBm and the second pump2 power of 24.5 dBm. In a second SFG process (NAND gate), more than 15 dB extinction ratio between signal and dropped signal has been observed with the coupled pump (amplified idler) power of 22.5 dBm. Further research is underway for the ps-pulse signal processing in optical communication networking and optical computing with a shorter Ti:PPLN device than the 80-mm-long sample which has the maximum walk-off time between the interacting signals of about 25 ps.
This work was supported by the Ministry of Commerce, Industry and Energy through the Technology Infrastructure Program.
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