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Optically clocked switched-emitter-follower THA in a photonic SiGe BiCMOS technology

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Abstract

In this paper a novel opto-electronic Track-and-Hold Amplifier (OE-THA) is presented. The OE-THA can be used as a sampler in a photonic analog-to-digital-converter (ADC). It is fabricated in a silicon photonic 250 nm SiGe BiCMOS technology to allow for monolithic integration of photonic and electronic components. The OE-THA chip exhibits a small signal bandwidth of over 65 GHz, a total harmonic distortion below −34 dB up to 75 GHz and a signal-to-noise and distortion ratio (SINAD) of over 35 dB (5.5 effective bits, ENOB) up to 45 GHz. The measured resolution bandwidth products result in a corresponding equivalent jitter of below 80 fs rms from 20 to 70 GHz. The best equivalent jitter is achieved at 41 GHz with a value of 55.8 fs rms. This is enabled by using a low-jitter optical pulse train, generated by a Mode-Locked-Laser (MLL), as an optical sampling clock. The circuit integrates all optical and electronic components besides the MLL. It draws 110 mA operated from a supply voltage of −4.6 V and occupies a silicon area of only 0.59 mm2.

© 2021 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

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Data availability

Design data cannot be made available due to legal restrictions from the foundry. Measurement data may be obtained from the authors upon reasonable request.

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Figures (7)

Fig. 1.
Fig. 1. Block diagram showing the individual circuit components of the silicon photonic chip. Photonic components: grating coupler (GC), taper, optical waveguides, PIN photodiode (PD), transimpedance amplifier (TIA). Electrical components: 50 Ω input buffer (InBuf), main amplifier (MA), switched-emitter-follower (SEF), output buffer (Out) and 50 Ω test buffer (Test).
Fig. 2.
Fig. 2. Simplified schematic of the 50 Ω input stage, main amplifier and switched-emitter-follower, including the pedestal compensation.
Fig. 3.
Fig. 3. (a) Active feedthrough attenuation circuit, (b) feed forward capacitance $C_{\textrm {ff}}$ (4-transistor network) used to compensate the base-emitter capacitance, (c) simplified schematic of the transimpedance amplifier (TIA) converting the optical pulse train to an electrical signal.
Fig. 4.
Fig. 4. (a) Micro-photograph of the fabricated chip. Dashed squares: GC (Grating Coupler), TIA (Transimpedance-Amplifier). (b) Transient measurement setup for input frequencies above 50 GHz. From 0-50 GHz the signal generator output is directly connected to the THA input
Fig. 5.
Fig. 5. (a) Single-ended s-parameter measurements of THA, while externally biased successively in the hold-mode (purple graph) and in the track-mode (yellow graph), (b) normalized power during track-and-hold operation calculated from spectrum-analyzer data.
Fig. 6.
Fig. 6. (a) Single-ended real-time measurement data for different input frequencies, (b) normalized spectrum analyzer data and important figures of merit for $P_{\textrm {in}}=$ −10 dBm, $f_{\textrm {in}}=$ 19.27 GHz/43.27 GHz. Resolution and video bandwidth are set to 1 kHz.
Fig. 7.
Fig. 7. (a) ENOB(SINAD) vs. frequency for varying input powers. The dashed lines show the 55 fs, 80 fs and 100 fs equivalent jitter limit respectively. (b) ENOB(THD) vs. frequency for varying input powers.

Tables (1)

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Table 1. Comparison to the state of the art

Equations (1)

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SNR = 20 log 10 ( 2 π f sig σ ji )
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