Abstract

In this paper, we proposed a class of large-girth QC-LDPC codes designed to maximize the girth property with code rates ranging from 0.5 to 0.8, which leads to well-structured parity-check matrix and generator matrix. Instead of implementing several FEC encoder and decoder engines in hardware, we design an efficient unified FPGA-based architecture enabling run-time reconfigurable capability. Apart from four principle LDPC codes being incorporated into a unified design, shortening is adopted to bridge the rate gap between principle codes. With our proposed unified LDPC engine, the signal-to-noise ratio (SNR) limits of −1 dB to 2.2 dB have been demonstrated at BER of 10−12 in additive white Gaussian noise (AWGN) channel by FPGA emulation. It is desirable for the application to both free-space optical (FSO) and fiber optics communications. Large code rate range is preferred to deal with various channel impairments. To further verify the proposed unified code engine for FSO applications, we tested the scheme through a spatial light modulator (SLM)-based FSO channel emulator. We showed that in medium atmospheric turbulence regime, a post-FEC BER below 10−8 can be achieved without any interleaver and adaptive optics.

© 2018 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

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References

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    [Crossref]
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    [Crossref]
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2016 (2)

2015 (4)

2013 (1)

2006 (1)

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

2004 (1)

M. P. C. Fossorier, “Quasi-cyclic low-density parity-check codes from circulant permutation matrices,” IEEE Trans. Inf. Theory 50(8), 1788–1793 (2004).
[Crossref]

2003 (1)

1981 (1)

R. M. Tanner, “A recursive approach to low complexity codes,” IEEE Trans. Inf. Theory 27(9), 533–547 (1981).
[Crossref]

Ahmed, N.

Aref, V.

A. Leven, V. Aref, J. Cho, D. Suikat, D. Rosener, and A. Leven, “Spatially coupled soft-decision error correction for future lightwave systems,” J. Lightwave Technol. 33(5), 1109–1116 (2015).
[Crossref]

L. Schmalen, D. Suikat, V. Aref, and D. Rosener, “On the design of capacity-approaching unit-memory spastically coupled LDPC codes for optical communications,” in ECOC (2016), pp. 1–3.

Arnon, S.

Boyd, R. W.

Chandrasekaran, N.

Chang, D.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Charlet, G.

Chen, J.

Chen, L.

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

Cho, J.

Cui, X.

Ding, T.

Djordjevic, I. B.

Dolinar, S.

Erkmen, B. I.

Fong, W. H.

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

Fossorier, M. P. C.

M. P. C. Fossorier, “Quasi-cyclic low-density parity-check codes from circulant permutation matrices,” IEEE Trans. Inf. Theory 50(8), 1788–1793 (2004).
[Crossref]

Huang, H.

Kahn, J. M.

N. Zhao, X. Li, G. Li, and J. M. Kahn, “Capacity limits of spatially multiplexed free-space communication,” Nat. Photonics 9(12), 822–826 (2015).
[Crossref]

Kedar, D.

Lavery, M. P. J.

Leven, A.

Li, C.

Li, G.

N. Zhao, X. Li, G. Li, and J. M. Kahn, “Capacity limits of spatially multiplexed free-space communication,” Nat. Photonics 9(12), 822–826 (2015).
[Crossref]

Li, L.

Li, X.

N. Zhao, X. Li, G. Li, and J. M. Kahn, “Capacity limits of spatially multiplexed free-space communication,” Nat. Photonics 9(12), 822–826 (2015).
[Crossref]

Li, Y.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Li, Z.

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

Lin, S.

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

Neifeld, M.

Padgett, M. J.

Qu, Z.

Ren, Y.

Renaudier, J.

Rios-Muller, R.

Rosener, D.

A. Leven, V. Aref, J. Cho, D. Suikat, D. Rosener, and A. Leven, “Spatially coupled soft-decision error correction for future lightwave systems,” J. Lightwave Technol. 33(5), 1109–1116 (2015).
[Crossref]

L. Schmalen, D. Suikat, V. Aref, and D. Rosener, “On the design of capacity-approaching unit-memory spastically coupled LDPC codes for optical communications,” in ECOC (2016), pp. 1–3.

Schemalen, L.

Schmalen, L.

L. Schmalen, D. Suikat, V. Aref, and D. Rosener, “On the design of capacity-approaching unit-memory spastically coupled LDPC codes for optical communications,” in ECOC (2016), pp. 1–3.

Shapiro, J. H.

Shi, X.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Si, M.

Steinhoff, N. K.

Stojanovic, N.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Suikat, D.

A. Leven, V. Aref, J. Cho, D. Suikat, D. Rosener, and A. Leven, “Spatially coupled soft-decision error correction for future lightwave systems,” J. Lightwave Technol. 33(5), 1109–1116 (2015).
[Crossref]

L. Schmalen, D. Suikat, V. Aref, and D. Rosener, “On the design of capacity-approaching unit-memory spastically coupled LDPC codes for optical communications,” in ECOC (2016), pp. 1–3.

Tanner, R. M.

R. M. Tanner, “A recursive approach to low complexity codes,” IEEE Trans. Inf. Theory 27(9), 533–547 (1981).
[Crossref]

Tran, P.

Tur, M.

Wang, Y.

Willner, A. E.

Xiang, H.

Xiao, Z.

Z. Zhang, C. Li, J. Chen, T. Ding, Y. Wang, H. Xiang, Z. Xiao, L. Li, M. Si, and X. Cui, “Coherent transceiver operating at 61-Gbaud/s,” Opt. Express 23(15), 18988–18995 (2015).
[Crossref] [PubMed]

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Xie, C.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Xie, G.

Xiong, Q.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Xu, X.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Yan, Y.

Yu, F.

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

Zeng, L.

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

Zhang, Z.

Zhao, N.

N. Zhao, X. Li, G. Li, and J. M. Kahn, “Capacity limits of spatially multiplexed free-space communication,” Nat. Photonics 9(12), 822–826 (2015).
[Crossref]

Zou, D.

Appl. Opt. (1)

IEEE Trans. Commun. (1)

Z. Li, L. Chen, L. Zeng, S. Lin, and W. H. Fong, “Efficient encoding of quasi-cyclic low-density parity-check codes,” IEEE Trans. Commun. 54(1), 71–81 (2006).
[Crossref]

IEEE Trans. Inf. Theory (2)

R. M. Tanner, “A recursive approach to low complexity codes,” IEEE Trans. Inf. Theory 27(9), 533–547 (1981).
[Crossref]

M. P. C. Fossorier, “Quasi-cyclic low-density parity-check codes from circulant permutation matrices,” IEEE Trans. Inf. Theory 50(8), 1788–1793 (2004).
[Crossref]

J. Lightwave Technol. (2)

Nat. Photonics (1)

N. Zhao, X. Li, G. Li, and J. M. Kahn, “Capacity limits of spatially multiplexed free-space communication,” Nat. Photonics 9(12), 822–826 (2015).
[Crossref]

Opt. Express (2)

Opt. Lett. (2)

Other (6)

D. Chang, F. Yu, Z. Xiao, Y. Li, N. Stojanovic, C. Xie, X. Shi, X. Xu, and Q. Xiong, “FPGA verification of a single QC-LDPC code for 100 Gb/s optical systems without error floor down to BER of 10−15,” in OFC/NFOEC (2011), paper OTuN2.

L. Schmalen, D. Suikat, V. Aref, and D. Rosener, “On the design of capacity-approaching unit-memory spastically coupled LDPC codes for optical communications,” in ECOC (2016), pp. 1–3.

ITU-T G. 975. 1, Forward error correction for high bit-rate DWDM submarine system, 2004.

F. Paludi, D. A. Morero, T. Goette, M. Schnidrig, F. Ramos, and M. R. Hueda, “Low-complexity turbo product code for high-speed fiber-optics systems based on expurgated BCH codes,” in ISCAS, 429–432 (2016).

C. Andrews, R. L. Phillips, and C. Y. Hopen, Laser beam scintillation with applications. (SPIE, 2001).

Y. Zhang and I. B. Djordjevic, “Staircase rate-adaptive LDPC-coded modulation for high-speed intelligent optical transmission,” in OFC/NFOEC, paper M3A.6 (2014).

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Figures (8)

Fig. 1
Fig. 1 Parity-check matrices for: (a) column weight of 3 and (b) column weight of 4.
Fig. 2
Fig. 2 Generator matrices for: (a) column weight of 3 and (b) column weight of 4.
Fig. 3
Fig. 3 High-level block diagram of the emulator.
Fig. 4
Fig. 4 Adaptive encoder of QC-LDPC: (a) overall architecture, (b) architecture of the shift-register-accumulated-adder (SRAA) circuit.
Fig. 5
Fig. 5 Adaptive decoder of QC-LDPC.
Fig. 6
Fig. 6 BER versus SNR performance for run-time reconfigurable LDPC coding.
Fig. 7
Fig. 7 Experimental setup with FSO channel emulator.
Fig. 8
Fig. 8 Raw BER versus post-FEC BER performance for experimental demonstration.

Tables (2)

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Table 1 Implementation resource utilization and power analysis

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Table 2 The proposed rate adaptive LDPC coding performance summary

Equations (1)

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H qc,γb×ρb =[ A( p 1,1 ) A( p 1,2 ) A( p 1,ρ ) A( p 2,1 ) A( p 2,2 ) A( p 2,ρ ) A( p γ,1 ) A( p γ,2 ) A( p γ,ρ ) ].

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