A fully-integrated 12.5-Gb/s 850-nm CMOS optical receiver based on a spatially-modulated avalanche photodetector

M.-J. Lee and W.-Y. Choi, “Area-dependent photodetection frequency response characterization of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Trans. Electron. Dev. 60(3), 998–1004 (2013).
[Crossref]

M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron. Device Lett. 33(1), 80–82 (2012).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

M.-J. Lee and W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[Crossref] [PubMed]

K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18-µm CMOS process,” IEEE Photonics Technol. Lett. 22(12), 932–934 (2010).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

T. S. Kao, F. A. Musa, and A. C. Carusone, “A 5-Gbit/s CMOS optical receiver with integrated spatially modulated light detector and equalization,” IEEE Trans. Circuits Syst. I, Reg. Pap. 57(11), 2844–2857 (2010).

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

F. Tavernier and M. S. J. Steyaert, “High-speed optical receivers with integrated photodiode in 130 nm CMOS,” IEEE J. Solid State Circuits 44(10), 2856–2867 (2009).
[Crossref]

W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A high-speed and high-responsivity photodiode in standard CMOS technology,” IEEE Photonics Technol. Lett. 19(4), 197–199 (2007).
[Crossref]

C. Gunn, “CMOS photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

R. Soref, “The past, present, and future of silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1678–1687 (2006).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

B. Jalali and S. Fathpour, “Silicon photonics,” J. Lightwave Technol. 24(12), 4600–4615 (2006).
[Crossref]

S. Radovanovic, A.-J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid State Circuits 40(8), 1706–1717 (2005).
[Crossref]

S. Radovanovic, A.-J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid State Circuits 40(8), 1706–1717 (2005).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

T. S. Kao, F. A. Musa, and A. C. Carusone, “A 5-Gbit/s CMOS optical receiver with integrated spatially modulated light detector and equalization,” IEEE Trans. Circuits Syst. I, Reg. Pap. 57(11), 2844–2857 (2010).

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

W.-Z. Chen and S.-H. Huang, “A 2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector,” in Proc. Custom Integrated Circuits Conf. 293–296 (2007).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

M.-J. Lee and W.-Y. Choi, “Area-dependent photodetection frequency response characterization of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Trans. Electron. Dev. 60(3), 998–1004 (2013).
[Crossref]

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron. Device Lett. 33(1), 80–82 (2012).
[Crossref]

M.-J. Lee and W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[Crossref] [PubMed]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

B. Jalali and S. Fathpour, “Silicon photonics,” J. Lightwave Technol. 24(12), 4600–4615 (2006).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

C. Gunn, “CMOS photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A high-speed and high-responsivity photodiode in standard CMOS technology,” IEEE Photonics Technol. Lett. 19(4), 197–199 (2007).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

W.-Z. Chen and S.-H. Huang, “A 2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector,” in Proc. Custom Integrated Circuits Conf. 293–296 (2007).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A high-speed and high-responsivity photodiode in standard CMOS technology,” IEEE Photonics Technol. Lett. 19(4), 197–199 (2007).
[Crossref]

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18-µm CMOS process,” IEEE Photonics Technol. Lett. 22(12), 932–934 (2010).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

B. Jalali and S. Fathpour, “Silicon photonics,” J. Lightwave Technol. 24(12), 4600–4615 (2006).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

T. S. Kao, F. A. Musa, and A. C. Carusone, “A 5-Gbit/s CMOS optical receiver with integrated spatially modulated light detector and equalization,” IEEE Trans. Circuits Syst. I, Reg. Pap. 57(11), 2844–2857 (2010).

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

M.-J. Lee and W.-Y. Choi, “Area-dependent photodetection frequency response characterization of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Trans. Electron. Dev. 60(3), 998–1004 (2013).
[Crossref]

M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron. Device Lett. 33(1), 80–82 (2012).
[Crossref]

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

M.-J. Lee and W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[Crossref] [PubMed]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A high-speed and high-responsivity photodiode in standard CMOS technology,” IEEE Photonics Technol. Lett. 19(4), 197–199 (2007).
[Crossref]

K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18-µm CMOS process,” IEEE Photonics Technol. Lett. 22(12), 932–934 (2010).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

T. S. Kao, F. A. Musa, and A. C. Carusone, “A 5-Gbit/s CMOS optical receiver with integrated spatially modulated light detector and equalization,” IEEE Trans. Circuits Syst. I, Reg. Pap. 57(11), 2844–2857 (2010).

S. Radovanovic, A.-J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid State Circuits 40(8), 1706–1717 (2005).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

S. Radovanovic, A.-J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid State Circuits 40(8), 1706–1717 (2005).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron. Device Lett. 33(1), 80–82 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

R. Soref, “The past, present, and future of silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1678–1687 (2006).
[Crossref]

F. Tavernier and M. S. J. Steyaert, “High-speed optical receivers with integrated photodiode in 130 nm CMOS,” IEEE J. Solid State Circuits 44(10), 2856–2867 (2009).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18-µm CMOS process,” IEEE Photonics Technol. Lett. 22(12), 932–934 (2010).
[Crossref]

F. Tavernier and M. S. J. Steyaert, “High-speed optical receivers with integrated photodiode in 130 nm CMOS,” IEEE J. Solid State Circuits 44(10), 2856–2867 (2009).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

R. Gaudino, D. Cárdenas, M. Bellec, B. Charbonnier, N. Evanno, P. Guignard, S. Meyer, A. Pizzinat, I. Möllers, and D. Jäger, “Perspective in next-generation home networks-Toward optical solutions,” IEEE Commun. Mag. 48(2), 39–47 (2010).
[Crossref]

M.-J. Lee, H. Rücker, and W.-Y. Choi, “Effects of guard-ring structures on the performance of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Electron. Device Lett. 33(1), 80–82 (2012).
[Crossref]

J.-S. Youn, M.-J. Lee, K.-Y. Park, and W.-Y. Choi, “10-Gb/s 850-nm CMOS OEIC receiver with a silicon avalanche photodetector,” IEEE J. Quantum Electron. 48(2), 229–236 (2012).
[Crossref]

N. Bamiedakis, J. Beals, R. V. Penty, I. H. White, J. V. DeGroot, and T. V. Clapp, “Cost-effective multimode polymer waveguides for high-speed on-board optical interconnect,” IEEE J. Quantum Electron. 45(4), 415–424 (2009).
[Crossref]

R. Soref, “The past, present, and future of silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1678–1687 (2006).
[Crossref]

N. Izhaky, M. T. Morse, S. Koehl, O. Cohen, D. Rubin, A. Barkai, G. Sarid, R. Cohen, and M. J. Paniccia, “Development of CMOS-compatible integrated silicon photonics devices,” IEEE J. Sel. Top. Quantum Electron. 12(6), 1688–1698 (2006).
[Crossref]

F.-P. Chou, G.-Y. Chen, C.-W. Wang, Y.-C. Liu, W.-K. Huang, and Y.-M. Hsin, “Silicon photodiodes in standard CMOS technology,” IEEE J. Sel. Top. Quantum Electron. 17(3), 730–740 (2011).
[Crossref]

S.-H. Huang, W.-Z. Chen, Y.-W. Chang, and Y.-T. Huang, “A 10-Gb/s OEIC with meshed spatially-modulated photo detector in 0.18-µm CMOS technology,” IEEE J. Solid State Circuits 46(5), 1158–1169 (2011).
[Crossref]

F. Tavernier and M. S. J. Steyaert, “High-speed optical receivers with integrated photodiode in 130 nm CMOS,” IEEE J. Solid State Circuits 44(10), 2856–2867 (2009).
[Crossref]

I. A. Young, E. Mohammed, J. T. S. Liao, A. M. Kern, S. Palermo, B. A. Block, M. R. Reshotko, and P. L. D. Chang, “Optical I/O technology for tera-scale computing,” IEEE J. Solid State Circuits 45(1), 235–248 (2010).
[Crossref]

S. Radovanovic, A.-J. Annema, and B. Nauta, “A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication,” IEEE J. Solid State Circuits 40(8), 1706–1717 (2005).
[Crossref]

D. Lee, J. Han, G. Han, and S. M. Park, “An 8.5-Gb/s fully integrated CMOS optoelectronic receiver using slop-detection adaptive equalizer,” IEEE J. Solid State Circuits 45(12), 2861–2873 (2010).
[Crossref]

C. Gunn, “CMOS photonics for high-speed interconnects,” IEEE Micro 26(2), 58–66 (2006).
[Crossref]

W.-K. Huang, Y.-C. Liu, and Y.-M. Hsin, “A high-speed and high-responsivity photodiode in standard CMOS technology,” IEEE Photonics Technol. Lett. 19(4), 197–199 (2007).
[Crossref]

K. Iiyama, H. Takamatsu, and T. Maruyama, “Hole-injection-type and electron-injection-type silicon avalanche photodiodes fabricated by standard 0.18-µm CMOS process,” IEEE Photonics Technol. Lett. 22(12), 932–934 (2010).
[Crossref]

T. S. Kao, F. A. Musa, and A. C. Carusone, “A 5-Gbit/s CMOS optical receiver with integrated spatially modulated light detector and equalization,” IEEE Trans. Circuits Syst. I, Reg. Pap. 57(11), 2844–2857 (2010).

M.-J. Lee and W.-Y. Choi, “Area-dependent photodetection frequency response characterization of silicon avalanche photodetectors fabricated with standard CMOS technology,” IEEE Trans. Electron. Dev. 60(3), 998–1004 (2013).
[Crossref]

B. Jalali and S. Fathpour, “Silicon photonics,” J. Lightwave Technol. 24(12), 4600–4615 (2006).
[Crossref]

C. L. Schow, F. E. Doany, A. V. Rylyakov, B. G. Lee, C. V. Jahnes, Y. H. Kwark, C. W. Baks, D. M. Kuchta, and J. A. Kash, “A 24-channel, 300 Gb/s, 8.2 pJ/bit, full-duplex fiber-coupled optical transceiver module based on a single “holey” CMOS IC,” J. Lightwave Technol. 29(4), 542–553 (2011).
[Crossref]

F. E. Doany, C. L. Schow, B. G. Lee, R. A. Budd, C. W. Baks, C. K. Tsang, J. U. Knickerbocker, R. Dangel, B. Chan, H. Lin, C. Carver, J. Huang, J. Berry, D. Bajkowski, F. Libsch, and J. A. Kash, “Terabit/s-class optical PCB links incorporating 360-Gb/s bidirectional 850 nm parallel optical transceivers,” J. Lightwave Technol. 30(4), 560–571 (2012).
[Crossref]

L. Dellmann, U. Drechsler, T. Morf, H. Rothuizen, R. Stutz, J. Weiss, and M. Despont, “3D opto-electrical device stacking on CMOS,” Microelectron. Eng. 87(5–8), 1210–1212 (2010).
[Crossref]

P. Duan, O. Raz, B. E. Smalbrugge, J. Duis, and H. J. S. Dorren, “A novel 3D stacking method for Opto-electronic dies on CMOS ICs,” Opt. Express 20(26), B386–B392 (2012).
[Crossref] [PubMed]

M.-J. Lee and W.-Y. Choi, “A silicon avalanche photodetector fabricated with standard CMOS technology with over 1 THz gain-bandwidth product,” Opt. Express 18(23), 24189–24194 (2010).
[Crossref] [PubMed]

D. A. B. Miller, “Device requirements for optical interconnects to silicon chips,” Proc. IEEE 97(7), 1166–1185 (2009).
[Crossref]

O. Strobel, R. Rejeb, and J. Lubkoll, “Communication in automotive systems: principles, limits and new trends for vehicles, airplanes and vessels,” Int. Conf. Transparent Opt. Netw. 1–6 (2010).
[Crossref]

W.-Z. Chen, S.-H. Huang, G.-W. Wu, C.-C. Liu, Y.-T. Huang, C.-F. Chiu, W.-H. Chang, and Y.-Z. Juang, “A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer,” in Proc. IEEE Asian Solid-State Circuits Conf. 396–399 (2007).

W.-Z. Chen and S.-H. Huang, “A 2.5 Gbps CMOS fully integrated optical receiver with lateral PIN detector,” in Proc. Custom Integrated Circuits Conf. 293–296 (2007).
[Crossref]

H. Zimmermann, Integrated Silicon Optoelectronics, 2nd ed. (Springer, 2009).