Abstract
We examine the instability behavior of nanocrystalline silicon (nc-Si) thin-film
transistors (TFTs) in the presence of electrical and optical stress. The change in
threshold voltage and sub-threshold slope is more significant under combined
bias-and-light stress when compared to bias stress alone. The threshold voltage shift
(Δ<i>V<sub>T</sub></i>) after 6 h of bias stress is about 7 times larger in the case with
illumination than in the dark. Under bias stress alone, the primary instability
mechanism is charge trapping at the semiconductor/insulator interface. In contrast,
under combined bias-and-light stress, the prevailing mechanism appears to be the
creation of defect states in the channel, and believed to take place in the amorphous
phase, where the increase in the electron density induced by electrical bias enhances
the non-radiative recombination of photo-excited electron-hole pairs. The results
reported here are consistent with observations of photo-induced efficiency degradation
in solar cells.
© 2010 IEEE
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