Abstract
The impact of gate fan-in and fan-out limits on digital circuit delay is
discussed with a set of benchmark circuits. This research presents the
advantages of exploiting the ability of optoelectronic gates to perform both
logic operations and optical interconnections with systematic optimization. It
is possible for gate-level optical interconnected optoelectronic circuits to
compete with their pure silicon counterparts in terms of the combinational
circuit delay and system clock rate.
© 1997 Optical Society of America
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