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Conferences > OFC > 2018 > W1I > W1I.2

Error-Free Loopback of a Compact 25 Gb/s × 4 ch WDM Transceiver Assembly Incorporating Silicon (De)Multiplexers with Automated Phase-Error Correction

Tomoyuki Akiyama, Tsuyoshi Aoki, Takasi Simoyama, Akio Sugama, Shigeaki Sekiguchi, Yohei Sobu, Shinsuke Tanaka, Yu Tanaka, Seok-Hwan Jeong, Motoyuki Nishizawa, Nobuaki Hatori, Akinori Hayakawa, and Toshihiko Mori

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Abstract

We propose (de)multiplexers based on tunable cascaded asymmetric Mach-Zehnder interferometers to exclude necessity of highly-scaled expensive Si process by fully-automated fabrication error correction. Incorporating two sets of (de)multiplexers in a 12 × 12 mm transceiver assembly with modulators, photodiodes, drivers, and TIAs, we demonstrate an error-free 25 Gb/s × 4 ch loopback communication.

© 2018 The Author(s)

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