Expand this Topic clickable element to expand a topic
Skip to content
Optica Publishing Group
  • Optical Fiber Communication Conference and National Fiber Optic Engineers Conference
  • OSA Technical Digest (CD) (Optica Publishing Group, 2009),
  • paper OTuI4
  • https://doi.org/10.1364/OFC.2009.OTuI4

Ultra-low Latency Reconfigurable Photonic Network on Chip Architecture Based on Application Pattern

Not Accessible

Your library or personal account may give you access

Abstract

This paper presents a reconfigurable Photonic Network on Chip architecture and evaluates its ultra-low latency potential. The latency performance simulation shows a 50% decrease compared to static Photonic Network on Chip.

© 2009 Optical Society of America

PDF Article
More Like This
On the Feasibility of Reconfigurable Photonic Network on Chip

Yaohui Jin, Jianxiong Tang, Zhijuan Chang, Yu Gao, and Weisheng Hu
ThH4_2 Conference on Lasers and Electro-Optics/Pacific Rim (CLEO/PR) 2009

Deflection Routing in Multi-Channel Photonic Network on Chip Architecture

Jianxiong Tang, Yaohui Jin, and Zhijuan Chang
ThD3 Asia Communications and Photonics Conference and Exhibition (ACP) 2009

A Performance Evaluation for Optical Network-on-Chip Interconnect Architectures

Shiqing Wang and Huaxi Gu
ThD4 Asia Communications and Photonics Conference and Exhibition (ACP) 2009

Select as filters


Select Topics Cancel
© Copyright 2024 | Optica Publishing Group. All rights reserved, including rights for text and data mining and training of artificial technologies or similar technologies.