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A Multi-Lane Optical Receiver with Integrated Photodiodes in 90nm Standard CMOS

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Abstract

A multi-lane optical receiver with integrated photodiodes is fabricated in a 90nm CMOS process, the first in a standard CMOS node below 100nm. It has a sensitivity of -3.7dBm at a 3.125Gbps data rate and consumes 46.3mW per lane from a 1.2V supply.

© 2012 Optical Society of America

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