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Optica Publishing Group
  • CLEO/Europe and IQEC 2007 Conference Digest
  • (Optica Publishing Group, 2007),
  • paper CK_8

Effect of lithography stitching errors on Silicon-on-Insulator photonic wires

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Abstract

Electron Beam Lithography (EBL) is a widely used tool in the patterning of photonic integrated circuits, either by direct writing or by UV lithography with e-beam defined masks. It provides the benefit of pattern flexibility, high accuracy and the required nanometre-scale resolution. One of the major technological limitations of EBL is its limited writing field that restricts the maximum pattern dimensions to typically a maximum of ~1 mm. Alignment of writing fields is required for larger patterns and may introduce offsets (stitching errors) in the pattern, which are enhanced by nonoptimal sample flatness. Variations of the substrate planarity are generated by local stress (irregularities underneath the sample, sample clamping), or by global tilt (sample loading, use of thinned, polished samples). The performance of photonic circuits can be strongly affected by stitching errors, since these increase the loss from radiative modes, the back-reflection of guided modes, and introduce phase errors in grating structures [1].

© 2007 IEEE

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